3081e43b97
In anticipation of PMU support for Realview boards, the IRQs defined for some of these boards need updating. This patch removes incorrect L220 IRQ definitions, corrects incorrect PMU IRQs and adds any missing IRQs that are required. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
110 lines
4.7 KiB
C
110 lines
4.7 KiB
C
/*
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* arch/arm/mach-realview/include/mach/irqs-pbx.h
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*
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* Copyright (C) 2009 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __MACH_IRQS_PBX_H
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#define __MACH_IRQS_PBX_H
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#define IRQ_PBX_GIC_START 32
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/*
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* PBX on-board gic irq sources
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*/
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#define IRQ_PBX_WATCHDOG (IRQ_PBX_GIC_START + 0) /* Watchdog timer */
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#define IRQ_PBX_SOFT (IRQ_PBX_GIC_START + 1) /* Software interrupt */
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#define IRQ_PBX_COMMRx (IRQ_PBX_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_PBX_COMMTx (IRQ_PBX_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_PBX_TIMER0_1 (IRQ_PBX_GIC_START + 4) /* Timer 0/1 (default timer) */
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#define IRQ_PBX_TIMER2_3 (IRQ_PBX_GIC_START + 5) /* Timer 2/3 */
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#define IRQ_PBX_GPIO0 (IRQ_PBX_GIC_START + 6) /* GPIO 0 */
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#define IRQ_PBX_GPIO1 (IRQ_PBX_GIC_START + 7) /* GPIO 1 */
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#define IRQ_PBX_GPIO2 (IRQ_PBX_GIC_START + 8) /* GPIO 2 */
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/* 9 reserved */
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#define IRQ_PBX_RTC (IRQ_PBX_GIC_START + 10) /* Real Time Clock */
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#define IRQ_PBX_SSP (IRQ_PBX_GIC_START + 11) /* Synchronous Serial Port */
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#define IRQ_PBX_UART0 (IRQ_PBX_GIC_START + 12) /* UART 0 on development chip */
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#define IRQ_PBX_UART1 (IRQ_PBX_GIC_START + 13) /* UART 1 on development chip */
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#define IRQ_PBX_UART2 (IRQ_PBX_GIC_START + 14) /* UART 2 on development chip */
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#define IRQ_PBX_UART3 (IRQ_PBX_GIC_START + 15) /* UART 3 on development chip */
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#define IRQ_PBX_SCI (IRQ_PBX_GIC_START + 16) /* Smart Card Interface */
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#define IRQ_PBX_MMCI0A (IRQ_PBX_GIC_START + 17) /* Multimedia Card 0A */
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#define IRQ_PBX_MMCI0B (IRQ_PBX_GIC_START + 18) /* Multimedia Card 0B */
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#define IRQ_PBX_AACI (IRQ_PBX_GIC_START + 19) /* Audio Codec */
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#define IRQ_PBX_KMI0 (IRQ_PBX_GIC_START + 20) /* Keyboard/Mouse port 0 */
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#define IRQ_PBX_KMI1 (IRQ_PBX_GIC_START + 21) /* Keyboard/Mouse port 1 */
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#define IRQ_PBX_CHARLCD (IRQ_PBX_GIC_START + 22) /* Character LCD */
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#define IRQ_PBX_CLCD (IRQ_PBX_GIC_START + 23) /* CLCD controller */
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#define IRQ_PBX_DMAC (IRQ_PBX_GIC_START + 24) /* DMA controller */
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#define IRQ_PBX_PWRFAIL (IRQ_PBX_GIC_START + 25) /* Power failure */
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#define IRQ_PBX_PISMO (IRQ_PBX_GIC_START + 26) /* PISMO interface */
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#define IRQ_PBX_DoC (IRQ_PBX_GIC_START + 27) /* Disk on Chip memory controller */
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#define IRQ_PBX_ETH (IRQ_PBX_GIC_START + 28) /* Ethernet controller */
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#define IRQ_PBX_USB (IRQ_PBX_GIC_START + 29) /* USB controller */
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#define IRQ_PBX_TSPEN (IRQ_PBX_GIC_START + 30) /* Touchscreen pen */
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#define IRQ_PBX_TSKPAD (IRQ_PBX_GIC_START + 31) /* Touchscreen keypad */
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#define IRQ_PBX_PMU_SCU0 (IRQ_PBX_GIC_START + 32) /* SCU PMU Interrupts (11mp) */
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#define IRQ_PBX_PMU_SCU1 (IRQ_PBX_GIC_START + 33)
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#define IRQ_PBX_PMU_SCU2 (IRQ_PBX_GIC_START + 34)
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#define IRQ_PBX_PMU_SCU3 (IRQ_PBX_GIC_START + 35)
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#define IRQ_PBX_PMU_SCU4 (IRQ_PBX_GIC_START + 36)
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#define IRQ_PBX_PMU_SCU5 (IRQ_PBX_GIC_START + 37)
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#define IRQ_PBX_PMU_SCU6 (IRQ_PBX_GIC_START + 38)
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#define IRQ_PBX_PMU_SCU7 (IRQ_PBX_GIC_START + 39)
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#define IRQ_PBX_WATCHDOG1 (IRQ_PBX_GIC_START + 40) /* Watchdog1 timer */
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#define IRQ_PBX_TIMER4_5 (IRQ_PBX_GIC_START + 41) /* Timer 0/1 (default timer) */
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#define IRQ_PBX_TIMER6_7 (IRQ_PBX_GIC_START + 42) /* Timer 2/3 */
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/* ... */
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#define IRQ_PBX_PMU_CPU0 (IRQ_PBX_GIC_START + 44) /* CPU PMU Interrupts */
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#define IRQ_PBX_PMU_CPU1 (IRQ_PBX_GIC_START + 45)
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#define IRQ_PBX_PMU_CPU2 (IRQ_PBX_GIC_START + 46)
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#define IRQ_PBX_PMU_CPU3 (IRQ_PBX_GIC_START + 47)
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/* ... */
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#define IRQ_PBX_PCI0 (IRQ_PBX_GIC_START + 50)
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#define IRQ_PBX_PCI1 (IRQ_PBX_GIC_START + 51)
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#define IRQ_PBX_PCI2 (IRQ_PBX_GIC_START + 52)
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#define IRQ_PBX_PCI3 (IRQ_PBX_GIC_START + 53)
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#define IRQ_PBX_SMC -1
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#define IRQ_PBX_SCTL -1
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#define NR_GIC_PBX 1
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/*
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* Only define NR_IRQS if less than NR_IRQS_PBX
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*/
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#define NR_IRQS_PBX (IRQ_PBX_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_PBX)
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#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBX)
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_PBX
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#endif
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#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBX)
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_PBX
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#endif
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#endif /* CONFIG_MACH_REALVIEW_PBX */
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#endif /* __MACH_IRQS_PBX_H */
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