ebab9426cd
Fix typos in Documentation/ABI. The changes are in descriptions or comments where they shouldn't affect use of the ABIs. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20230814212822.193684-2-helgaas@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
527 lines
19 KiB
Plaintext
527 lines
19 KiB
Plaintext
What: /sys/bus/coresight/devices/etm<N>/enable_source
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Enable/disable tracing on this specific trace entiry.
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Enabling a source implies the source has been configured
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properly and a sink has been identidifed for it. The path
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of coresight components linking the source to the sink is
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configured and managed automatically by the coresight framework.
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What: /sys/bus/coresight/devices/etm<N>/cpu
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) The CPU this tracing entity is associated with.
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What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of PE comparator inputs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of address comparator pairs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_cntr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of counters that are available for
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tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates how many external inputs are implemented.
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What: /sys/bus/coresight/devices/etm<N>/numcidc
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of Context ID comparators that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/numvmidc
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of VMID comparators that are available
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for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nrseqstate
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of sequencer states that are
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implemented.
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What: /sys/bus/coresight/devices/etm<N>/nr_resource
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of resource selection pairs that are
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available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/nr_ss_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Indicates the number of single-shot comparator controls that
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are available for tracing.
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What: /sys/bus/coresight/devices/etm<N>/reset
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Write) Cancels all configuration on a trace unit and set it back
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to its boot configuration.
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What: /sys/bus/coresight/devices/etm<N>/mode
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls various modes supported by this ETM, for example
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P0 instruction tracing, branch broadcast, cycle counting and
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context ID tracing.
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What: /sys/bus/coresight/devices/etm<N>/pe
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls which PE to trace.
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What: /sys/bus/coresight/devices/etm<N>/event
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the tracing of arbitrary events from bank 0 to 3.
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What: /sys/bus/coresight/devices/etm<N>/event_instren
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the behavior of the events in bank 0 to 3.
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What: /sys/bus/coresight/devices/etm<N>/event_ts
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the insertion of global timestamps in the trace
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streams.
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What: /sys/bus/coresight/devices/etm<N>/syncfreq
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls how often trace synchronization requests occur.
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What: /sys/bus/coresight/devices/etm<N>/cyc_threshold
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Sets the threshold value for cycle counting.
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What: /sys/bus/coresight/devices/etm<N>/bb_ctrl
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls which regions in the memory map are enabled to
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use branch broadcasting.
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What: /sys/bus/coresight/devices/etm<N>/event_vinst
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls instruction trace filtering.
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What: /sys/bus/coresight/devices/etm<N>/s_exlevel_vinst
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) In Secure state, each bit controls whether instruction
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tracing is enabled for the corresponding exception level.
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What: /sys/bus/coresight/devices/etm<N>/ns_exlevel_vinst
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) In non-secure state, each bit controls whether instruction
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tracing is enabled for the corresponding exception level.
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What: /sys/bus/coresight/devices/etm<N>/addr_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which address comparator or pair (of comparators) to
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work with.
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What: /sys/bus/coresight/devices/etm<N>/addr_instdatatype
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls what type of comparison the trace unit performs.
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What: /sys/bus/coresight/devices/etm<N>/addr_single
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Used to setup single address comparator values.
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What: /sys/bus/coresight/devices/etm<N>/addr_range
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Used to setup address range comparator values.
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What: /sys/bus/coresight/devices/etm<N>/seq_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which sequensor.
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What: /sys/bus/coresight/devices/etm<N>/seq_state
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Use this to set, or read, the sequencer state.
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What: /sys/bus/coresight/devices/etm<N>/seq_event
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Moves the sequencer state to a specific state.
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What: /sys/bus/coresight/devices/etm<N>/seq_reset_event
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Moves the sequencer to state 0 when a programmed event
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occurs.
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What: /sys/bus/coresight/devices/etm<N>/cntr_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which counter unit to work with.
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What: /sys/bus/coresight/devices/etm<N>/cntrldvr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) This sets or returns the reload count value of the
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specific counter.
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What: /sys/bus/coresight/devices/etm<N>/cntr_val
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) This sets or returns the current count value of the
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specific counter.
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What: /sys/bus/coresight/devices/etm<N>/cntr_ctrl
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the operation of the selected counter.
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What: /sys/bus/coresight/devices/etm<N>/res_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which resource selection unit to work with.
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What: /sys/bus/coresight/devices/etm<N>/res_ctrl
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the selection of the resources in the trace unit.
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What: /sys/bus/coresight/devices/etm<N>/ctxid_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which context ID comparator to work with.
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What: /sys/bus/coresight/devices/etm<N>/ctxid_pid
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Get/Set the context ID comparator value to trigger on.
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What: /sys/bus/coresight/devices/etm<N>/ctxid_masks
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Mask for all 8 context ID comparator value
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registers (if implemented).
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What: /sys/bus/coresight/devices/etm<N>/vmid_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which virtual machine ID comparator to work with.
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What: /sys/bus/coresight/devices/etm<N>/vmid_val
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Get/Set the virtual machine ID comparator value to
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trigger on.
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What: /sys/bus/coresight/devices/etm<N>/vmid_masks
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Mask for all 8 virtual machine ID comparator value
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registers (if implemented).
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What: /sys/bus/coresight/devices/etm<N>/addr_exlevel_s_ns
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Set the Exception Level matching bits for secure and
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non-secure exception levels.
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What: /sys/bus/coresight/devices/etm<N>/vinst_pe_cmp_start_stop
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Access the start stop control register for PE input
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comparators.
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What: /sys/bus/coresight/devices/etm<N>/addr_cmp_view
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the current settings for the selected address
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comparator.
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What: /sys/bus/coresight/devices/etm<N>/sshot_idx
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select the single shot control register to access.
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What: /sys/bus/coresight/devices/etm<N>/sshot_ctrl
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Access the selected single shot control register.
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What: /sys/bus/coresight/devices/etm<N>/sshot_status
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the current value of the selected single shot
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status register.
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What: /sys/bus/coresight/devices/etm<N>/sshot_pe_ctrl
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Date: December 2019
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KernelVersion: 5.5
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Access the selected single show PE comparator control
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register.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the OS Lock Status Register (0x304).
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The value it taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdcr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Power Down Control Register
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(0x310). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdsr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Power Down Status Register
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(0x314). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trclsr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the SW Lock Status Register
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(0xFB4). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcauthstatus
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Authentication Status Register
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(0xFB8). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevid
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Device ID Register
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(0xFC8). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevarch
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Date: January 2021
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KernelVersion: 5.12
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Device Architecture Register
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(offset 0xFBC). The value is taken directly read
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from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Device Type Register
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(0xFCC). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr0
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Peripheral ID0 Register
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(0xFE0). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr1
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Peripheral ID1 Register
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(0xFE4). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr2
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Peripheral ID2 Register
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(0xFE8). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr3
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the Peripheral ID3 Register
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(0xFEC). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trcconfig
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Date: February 2016
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KernelVersion: 4.07
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the trace configuration register
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(0x010) as currently set by SW.
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What: /sys/bus/coresight/devices/etm<N>/mgmt/trctraceid
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Date: February 2016
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KernelVersion: 4.07
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Print the content of the trace ID register (0x040).
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr0
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Returns the tracing capabilities of the trace unit (0x1E0).
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The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr1
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Returns the tracing capabilities of the trace unit (0x1E4).
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The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr2
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Returns the maximum size of the data value, data address,
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|
VMID, context ID and instruction address in the trace unit
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|
(0x1E8). The value is taken directly from the HW.
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr3
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Returns the value associated with various resources
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|
available to the trace unit. See the Trace Macrocell
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|
architecture specification for more details (0x1E8).
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|
The value is taken directly from the HW.
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|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr4
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Date: April 2015
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|
KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (Read) Returns how many resources the trace unit supports (0x1F0).
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|
The value is taken directly from the HW.
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|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr5
|
|
Date: April 2015
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|
KernelVersion: 4.01
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|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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|
Description: (Read) Returns how many resources the trace unit supports (0x1F4).
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|
The value is taken directly from the HW.
|
|
|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr8
|
|
Date: April 2015
|
|
KernelVersion: 4.01
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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|
Description: (Read) Returns the maximum speculation depth of the instruction
|
|
trace stream. (0x180). The value is taken directly from the HW.
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|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr9
|
|
Date: April 2015
|
|
KernelVersion: 4.01
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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|
Description: (Read) Returns the number of P0 right-hand keys that the trace unit
|
|
can use (0x184). The value is taken directly from the HW.
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|
|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr10
|
|
Date: April 2015
|
|
KernelVersion: 4.01
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
Description: (Read) Returns the number of P1 right-hand keys that the trace unit
|
|
can use (0x188). The value is taken directly from the HW.
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|
|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr11
|
|
Date: April 2015
|
|
KernelVersion: 4.01
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
Description: (Read) Returns the number of special P1 right-hand keys that the
|
|
trace unit can use (0x18C). The value is taken directly from
|
|
the HW.
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|
|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr12
|
|
Date: April 2015
|
|
KernelVersion: 4.01
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
Description: (Read) Returns the number of conditional P1 right-hand keys that
|
|
the trace unit can use (0x190). The value is taken directly
|
|
from the HW.
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|
|
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What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr13
|
|
Date: April 2015
|
|
KernelVersion: 4.01
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
Description: (Read) Returns the number of special conditional P1 right-hand keys
|
|
that the trace unit can use (0x194). The value is taken
|
|
directly from the HW.
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|
|
|
What: /sys/bus/coresight/devices/etm<N>/ts_source
|
|
Date: October 2022
|
|
KernelVersion: 6.1
|
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org> or Suzuki K Poulose <suzuki.poulose@arm.com>
|
|
Description: (Read) When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for
|
|
trace session. Otherwise -1 indicates an unknown time source. Check
|
|
trcidr0.tssize to see if a global timestamp is available.
|