7c38cf021b
Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Convert more drivers to register resources in board-*.c to take advantage of the driver model by David Brownell and Ladislav Michl - Use set_irq_type() for GPIO interrupts instead of omap_set_gpio_edge_ctrl() by David Brownell - Add minimal support for handling optional add-on boards, such as OSK Mistral board with LCD and keypad, by David Brownell - Minimal support for loading functions to SRAM by Tony Lindgren - Wake up from serial port by muxing RX lines temporarily into GPIO interrupts by Tony Lindgren - 32KHz sched_clock by Tony Lindgren and Juha Yrjola Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
192 lines
4.4 KiB
C
192 lines
4.4 KiB
C
/*
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* linux/arch/arm/mach-omap1/board-perseus2.c
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*
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* Modified from board-generic.c
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*
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* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
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* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <asm/arch/tc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/fpga.h>
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#include <asm/arch/common.h>
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
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.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_730_MPU_EXT_NIRQ,
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.end = 0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static int __initdata p2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 0};
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static struct mtd_partition p2_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* rest of flash is a file system */
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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},
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};
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static struct flash_platform_data p2_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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.parts = p2_partitions,
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.nr_parts = ARRAY_SIZE(p2_partitions),
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};
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static struct resource p2_flash_resource = {
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.start = OMAP_CS0_PHYS,
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.end = OMAP_CS0_PHYS + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device p2_flash_device = {
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.name = "omapflash",
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.id = 0,
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.dev = {
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.platform_data = &p2_flash_data,
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},
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.num_resources = 1,
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.resource = &p2_flash_resource,
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct platform_device *devices[] __initdata = {
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&p2_flash_device,
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&smc91x_device,
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};
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static void __init omap_perseus2_init(void)
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{
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(void) platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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static void __init perseus2_init_smc91x(void)
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{
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fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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}
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void omap_perseus2_init_irq(void)
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{
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omap_init_irq();
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omap_gpio_init();
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perseus2_init_smc91x();
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}
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/* Only FPGA needs to be mapped here. All others are done with ioremap */
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static struct map_desc omap_perseus2_io_desc[] __initdata = {
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{H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE,
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MT_DEVICE},
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};
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static void __init omap_perseus2_map_io(void)
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{
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omap_map_common_io();
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iotable_init(omap_perseus2_io_desc,
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ARRAY_SIZE(omap_perseus2_io_desc));
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/* Early, board-dependent init */
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/*
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* Hold GSM Reset until needed
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*/
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omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
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/*
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* UARTs -> done automagically by 8250 driver
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*/
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/*
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* CSx timings, GPIO Mux ... setup
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*/
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/* Flash: CS0 timings setup */
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omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
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omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
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/*
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* Ethernet support trough the debug board
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* CS1 timings setup
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*/
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omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
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omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
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/*
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* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
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* It is used as the Ethernet controller interrupt
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*/
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omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
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omap_serial_init(p2_serial_ports);
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}
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MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
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/* Maintainer: Kevin Hilman <kjh@hilman.org> */
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.phys_ram = 0x10000000,
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.phys_io = 0xfff00000,
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.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
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.boot_params = 0x10000100,
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.map_io = omap_perseus2_map_io,
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.init_irq = omap_perseus2_init_irq,
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.init_machine = omap_perseus2_init,
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.timer = &omap_timer,
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MACHINE_END
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