Sujith 25e2ab17fd ath9k_hw: always set the core clock for AR9271 ... When initializing the PLL on AR9271 we always need to set the core clock to 117MHz. While at it remove the baud rate settings for the serial device on the AR9271, the default settings work well unless you want to customize it. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>		2010-03-23 16:50:16 -04:00
..
ahb.c
ani.c
ani.h
ath9k.h
beacon.c
btcoex.c
btcoex.h
calib.c	ath9k_hw: use the skip count for PA calibration on AR9271	2010-03-23 16:50:15 -04:00
calib.h
common.c
common.h
debug.c
debug.h
eeprom_4k.c
eeprom_9287.c
eeprom_def.c
eeprom.c
eeprom.h
gpio.c
hw.c	ath9k_hw: always set the core clock for AR9271	2010-03-23 16:50:16 -04:00
hw.h	ath9k_hw: update initialization values for AR9271	2010-03-23 16:50:12 -04:00
init.c
initvals.h	ath9k_hw: update initialization values for AR9271	2010-03-23 16:50:12 -04:00
Kconfig
mac.c	ath9k_hw: fix TX descriptor setup for AR9271	2010-03-23 16:50:13 -04:00
mac.h
main.c
Makefile
pci.c
phy.c
phy.h	ath9k: disable RIFS search for AR91xx based chips	2010-02-26 16:59:11 -05:00
rc.c	ath9k: fix rate control tx status handling for A-MPDU	2010-03-10 17:44:45 -05:00
rc.h	ath9k: decrease size of ath9k.ko	2010-03-23 16:50:11 -04:00
recv.c
reg.h	ath9k_hw: add GPIO setup code for AR9271	2010-03-23 16:50:12 -04:00
virtual.c
xmit.c	ath9k: fix rate control tx status handling for A-MPDU	2010-03-10 17:44:45 -05:00