a88b5ba8bd
o Move all files from sparc64/kernel/ to sparc/kernel - rename as appropriate o Update sparc/Makefile to the changes o Update sparc/kernel/Makefile to include the sparc64 files NOTE: This commit changes link order on sparc64! Link order had to change for either of sparc32 and sparc64. And assuming sparc64 see more testing than sparc32 change link order on sparc64 where issues will be caught faster. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
98 lines
2.0 KiB
ArmAsm
98 lines
2.0 KiB
ArmAsm
#ifdef CONFIG_KGDB
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.globl arch_kgdb_breakpoint
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.type arch_kgdb_breakpoint,#function
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arch_kgdb_breakpoint:
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ta 0x72
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retl
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nop
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.size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
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#endif
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.type __do_privact,#function
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__do_privact:
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mov TLB_SFSR, %g3
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stxa %g0, [%g3] ASI_DMMU ! Clear FaultValid bit
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membar #Sync
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sethi %hi(109f), %g7
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ba,pt %xcc, etrap
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109: or %g7, %lo(109b), %g7
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call do_privact
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add %sp, PTREGS_OFF, %o0
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ba,pt %xcc, rtrap
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nop
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.size __do_privact,.-__do_privact
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.type do_mna,#function
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do_mna:
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rdpr %tl, %g3
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cmp %g3, 1
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/* Setup %g4/%g5 now as they are used in the
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* winfixup code.
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*/
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mov TLB_SFSR, %g3
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mov DMMU_SFAR, %g4
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ldxa [%g4] ASI_DMMU, %g4
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ldxa [%g3] ASI_DMMU, %g5
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stxa %g0, [%g3] ASI_DMMU ! Clear FaultValid bit
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membar #Sync
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bgu,pn %icc, winfix_mna
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rdpr %tpc, %g3
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1: sethi %hi(109f), %g7
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ba,pt %xcc, etrap
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109: or %g7, %lo(109b), %g7
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mov %l4, %o1
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mov %l5, %o2
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call mem_address_unaligned
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add %sp, PTREGS_OFF, %o0
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ba,pt %xcc, rtrap
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nop
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.size do_mna,.-do_mna
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.type do_lddfmna,#function
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do_lddfmna:
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sethi %hi(109f), %g7
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mov TLB_SFSR, %g4
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ldxa [%g4] ASI_DMMU, %g5
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stxa %g0, [%g4] ASI_DMMU ! Clear FaultValid bit
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membar #Sync
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mov DMMU_SFAR, %g4
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ldxa [%g4] ASI_DMMU, %g4
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ba,pt %xcc, etrap
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109: or %g7, %lo(109b), %g7
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mov %l4, %o1
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mov %l5, %o2
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call handle_lddfmna
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add %sp, PTREGS_OFF, %o0
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ba,pt %xcc, rtrap
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nop
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.size do_lddfmna,.-do_lddfmna
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.type do_stdfmna,#function
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do_stdfmna:
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sethi %hi(109f), %g7
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mov TLB_SFSR, %g4
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ldxa [%g4] ASI_DMMU, %g5
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stxa %g0, [%g4] ASI_DMMU ! Clear FaultValid bit
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membar #Sync
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mov DMMU_SFAR, %g4
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ldxa [%g4] ASI_DMMU, %g4
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ba,pt %xcc, etrap
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109: or %g7, %lo(109b), %g7
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mov %l4, %o1
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mov %l5, %o2
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call handle_stdfmna
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add %sp, PTREGS_OFF, %o0
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ba,pt %xcc, rtrap
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nop
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.size do_stdfmna,.-do_stdfmna
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.type breakpoint_trap,#function
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breakpoint_trap:
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call sparc_breakpoint
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add %sp, PTREGS_OFF, %o0
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ba,pt %xcc, rtrap
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nop
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.size breakpoint_trap,.-breakpoint_trap
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