1159788592
Move the drivers that use the i82586/i82593/i82596 chipsets into drivers/net/ethernet/i825xx/ and make the necessary Kconfig and Makefile changes. There were 4 3Com drivers which were initially moved into 3com/, which now reside in i825xx since they all used the i82586 chip. CC: Philip Blundell <philb@gnu.org> CC: Russell King <linux@arm.linux.org.uk> CC: <aris@cathedrallabs.org> CC: Donald Becker <becker@scyld.com> CC: Chris Beauregard <cpbeaure@undergrad.math.uwaterloo.ca> CC: Richard Procter <rnp@paradise.net.nz> CC: Andries Brouwer <aeb@cwi.nl> CC: "M.Hipp" <hippm@informatik.uni-tuebingen.de> CC: Richard Hirst <richard@sleepie.demon.co.uk> CC: Sam Creasey <sammy@oh.verio.com> CC: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
82 lines
1.4 KiB
C
82 lines
1.4 KiB
C
/*
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* 3COM "EtherLink MC/32" Descriptions
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*/
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/*
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* Registers
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*/
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#define HOST_CMD 0
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#define HOST_CMD_START_RX (1<<3)
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#define HOST_CMD_SUSPND_RX (3<<3)
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#define HOST_CMD_RESTRT_RX (5<<3)
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#define HOST_CMD_SUSPND_TX 3
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#define HOST_CMD_RESTRT_TX 5
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#define HOST_STATUS 2
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#define HOST_STATUS_CRR (1<<6)
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#define HOST_STATUS_CWR (1<<5)
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#define HOST_CTRL 6
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#define HOST_CTRL_ATTN (1<<7)
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#define HOST_CTRL_RESET (1<<6)
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#define HOST_CTRL_INTE (1<<2)
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#define HOST_RAMPAGE 8
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#define HALTED 0
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#define RUNNING 1
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struct mc32_mailbox
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{
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u16 mbox;
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u16 data[1];
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} __packed;
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struct skb_header
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{
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u8 status;
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u8 control;
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u16 next; /* Do not change! */
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u16 length;
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u32 data;
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} __packed;
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struct mc32_stats
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{
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/* RX Errors */
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u32 rx_crc_errors;
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u32 rx_alignment_errors;
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u32 rx_overrun_errors;
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u32 rx_tooshort_errors;
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u32 rx_toolong_errors;
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u32 rx_outofresource_errors;
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u32 rx_discarded; /* via card pattern match filter */
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/* TX Errors */
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u32 tx_max_collisions;
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u32 tx_carrier_errors;
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u32 tx_underrun_errors;
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u32 tx_cts_errors;
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u32 tx_timeout_errors;
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/* various cruft */
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u32 dataA[6];
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u16 dataB[5];
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u32 dataC[14];
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} __packed;
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#define STATUS_MASK 0x0F
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#define COMPLETED (1<<7)
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#define COMPLETED_OK (1<<6)
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#define BUFFER_BUSY (1<<5)
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#define CONTROL_EOP (1<<7) /* End Of Packet */
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#define CONTROL_EOL (1<<6) /* End of List */
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#define MCA_MC32_ID 0x0041 /* Our MCA ident */
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