6f231dda68
Support for the up to 2x4-port 6Gb/s SAS controllers embedded in the chipset. This is a snapshot of the first publicly available version of the driver, commit 4c1db2d0 in the 'historical' branch. git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git historical Signed-off-by: Maciej Trela <maciej.trela@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Edmund Nadolski <edmund.nadolski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
281 lines
7.1 KiB
C
281 lines
7.1 KiB
C
/*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SATA_H_
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#define _SATA_H_
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#include <linux/types.h>
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/**
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* This file defines all of the SATA releated constants, enumerations, and
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* types. Please note that this file does not necessarily contain an
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* exhaustive list of all contants and commands.
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*
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*
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*/
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/**
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*
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*
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* SATA FIS Types These constants depict the various SATA FIS types devined in
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* the serial ATA specification.
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*/
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#define SATA_FIS_TYPE_REGH2D 0x27
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#define SATA_FIS_TYPE_REGD2H 0x34
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#define SATA_FIS_TYPE_SETDEVBITS 0xA1
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#define SATA_FIS_TYPE_DMA_ACTIVATE 0x39
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#define SATA_FIS_TYPE_DMA_SETUP 0x41
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#define SATA_FIS_TYPE_BIST_ACTIVATE 0x58
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#define SATA_FIS_TYPE_PIO_SETUP 0x5F
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#define SATA_FIS_TYPE_DATA 0x46
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#define SATA_REGISTER_FIS_SIZE 0x20
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/**
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* struct sata_fis_header - This is the common definition for a SATA FIS Header
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* word. A different header word is defined for any FIS type that does not
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* use the standard header.
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*
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*
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*/
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struct sata_fis_header {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved:1;
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u32 direction_flag:1; /* direction */
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u32 interrupt_flag:1;
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u32 command_flag:1; /* command, auto_activate, or notification */
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u32 status:8;
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u32 error:8;
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};
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/**
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* struct sata_fis_reg_h2d - This is the definition for a SATA Host to Device
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* Register FIS.
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*
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*
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*/
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struct sata_fis_reg_h2d {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:3;
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u32 command_flag:1;
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u32 command:8;
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u32 features:8;
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u32 lba_low:8; /* word 1 */
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u32 lba_mid:8;
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u32 lba_high:8;
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u32 device:8;
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u32 lba_low_exp:8; /* word 2 */
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u32 lba_mid_exp:8;
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u32 lba_high_exp:8;
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u32 features_exp:8;
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u32 sector_count:8; /* word 3 */
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u32 sector_count_exp:8;
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u32 reserved1:8;
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u32 control:8;
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u32 reserved2; /* word 4 */
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};
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/**
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* struct sata_fis_reg_d2h - SATA Device To Host FIS
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*
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*
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*/
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struct sata_fis_reg_d2h {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:2;
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u32 irq:1;
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u32 reserved1:1;
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u32 status:8;
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u32 error:8;
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u8 lba_low; /* word 1 */
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u8 lba_mid;
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u8 lba_high;
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u8 device;
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u8 lba_low_exp; /* word 2 */
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u8 lba_mid_exp;
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u8 lba_high_exp;
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u8 reserved;
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u8 sector_count; /* word 3 */
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u8 sector_count_exp;
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u16 reserved2;
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u32 reserved3;
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};
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/**
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*
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*
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* Status field bit definitions
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*/
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#define SATA_FIS_STATUS_DEVBITS_MASK (0x77)
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/**
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* struct sata_fis_set_dev_bits - SATA Set Device Bits FIS
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*
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*
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*/
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struct sata_fis_set_dev_bits {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:2;
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u32 irq:1;
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u32 notification:1;
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u32 status_low:4;
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u32 status_high:4;
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u32 error:8;
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u32 s_active; /* word 1 */
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};
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/**
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* struct sata_fis_dma_activate - SATA DMA Activate FIS
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*
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*
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*/
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struct sata_fis_dma_activate {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:24;
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};
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/**
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*
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*
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* The lower 5 bits in the DMA Buffer ID Low field of the DMA Setup are used to
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* communicate the command tag.
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*/
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#define SATA_DMA_SETUP_TAG_ENABLE 0x1F
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#define SATA_DMA_SETUP_AUTO_ACT_ENABLE 0x80
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/**
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* struct sata_fis_dma_setup - SATA DMA Setup FIS
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*
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*
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*/
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struct sata_fis_dma_setup {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved_00:1;
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u32 direction:1;
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u32 irq:1;
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u32 auto_activate:1;
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u32 reserved_01:16;
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u32 dma_buffer_id_low; /* word 1 */
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u32 dma_buffer_id_high; /* word 2 */
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u32 reserved0; /* word 3 */
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u32 dma_buffer_offset; /* word 4 */
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u32 dma_transfer_count; /* word 5 */
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u32 reserved1; /* word 6 */
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};
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/**
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* struct sata_fis_bist_activate - SATA BIST Activate FIS
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*
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*
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*/
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struct sata_fis_bist_activate {
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u32 fis_type:8; /* word 0 */
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u32 reserved0:8;
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u32 pattern_definition:8;
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u32 reserved1:8;
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u32 data1; /* word 1 */
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u32 data2; /* word 1 */
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};
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/*
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* SATA PIO Setup FIS
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*/
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struct sata_fis_pio_setup {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved_00:1;
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u32 direction:1;
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u32 irq:1;
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u32 reserved_01:1;
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u32 status:8;
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u32 error:8;
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u32 lba_low:8; /* word 1 */
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u32 lba_mid:8;
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u32 lba_high:8;
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u32 device:8;
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u32 lba_low_exp:8; /* word 2 */
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u32 lba_mid_exp:8;
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u32 lba_high_exp:8;
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u32 reserved:8;
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u32 sector_count:8; /* word 3 */
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u32 sector_count_exp:8;
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u32 reserved1:8;
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u32 ending_status:8;
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u32 transfter_count:16; /* word 4 */
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u32 reserved3:16;
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};
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/**
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* struct sata_fis_data - SATA Data FIS
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*
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*
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*/
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struct sata_fis_data {
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u32 fis_type:8; /* word 0 */
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u32 pm_port:4;
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u32 reserved0:24;
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u8 data[4]; /* word 1 */
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};
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#endif /* _SATA_H_ */
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