9839c6b8dd
Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
245 lines
6.9 KiB
C
245 lines
6.9 KiB
C
/*
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* linux/include/asm-arm/arch-omap/dsp.h
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*
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* Header for OMAP DSP driver
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*
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* Copyright (C) 2002-2005 Nokia Corporation
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*
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* Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* 2005/06/01: DSP Gateway version 3.3
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*/
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#ifndef ASM_ARCH_DSP_H
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#define ASM_ARCH_DSP_H
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/*
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* for /dev/dspctl/ctl
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*/
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#define OMAP_DSP_IOCTL_RESET 1
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#define OMAP_DSP_IOCTL_RUN 2
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#define OMAP_DSP_IOCTL_SETRSTVECT 3
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#define OMAP_DSP_IOCTL_CPU_IDLE 4
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#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_ON 5
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#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_OFF 6
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#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_ON 7
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#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_OFF 8
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#define OMAP_DSP_IOCTL_GBL_IDLE 9
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#define OMAP_DSP_IOCTL_DSPCFG 10
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#define OMAP_DSP_IOCTL_DSPUNCFG 11
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#define OMAP_DSP_IOCTL_TASKCNT 12
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#define OMAP_DSP_IOCTL_POLL 13
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#define OMAP_DSP_IOCTL_REGMEMR 40
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#define OMAP_DSP_IOCTL_REGMEMW 41
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#define OMAP_DSP_IOCTL_REGIOR 42
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#define OMAP_DSP_IOCTL_REGIOW 43
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#define OMAP_DSP_IOCTL_GETVAR 44
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#define OMAP_DSP_IOCTL_SETVAR 45
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#define OMAP_DSP_IOCTL_RUNLEVEL 50
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#define OMAP_DSP_IOCTL_SUSPEND 51
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#define OMAP_DSP_IOCTL_RESUME 52
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#define OMAP_DSP_IOCTL_FBEN 53
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#define OMAP_DSP_IOCTL_FBDIS 54
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#define OMAP_DSP_IOCTL_MBSEND 99
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/*
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* for taskdev
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* (ioctls below should be >= 0x10000)
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*/
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#define OMAP_DSP_TASK_IOCTL_BFLSH 0x10000
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#define OMAP_DSP_TASK_IOCTL_SETBSZ 0x10001
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#define OMAP_DSP_TASK_IOCTL_LOCK 0x10002
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#define OMAP_DSP_TASK_IOCTL_UNLOCK 0x10003
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#define OMAP_DSP_TASK_IOCTL_GETNAME 0x10004
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/*
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* for /dev/dspctl/mem
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*/
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#define OMAP_DSP_MEM_IOCTL_EXMAP 1
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#define OMAP_DSP_MEM_IOCTL_EXUNMAP 2
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#define OMAP_DSP_MEM_IOCTL_EXMAP_FLUSH 3
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#define OMAP_DSP_MEM_IOCTL_FBEXPORT 5
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#define OMAP_DSP_MEM_IOCTL_MMUITACK 7
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#define OMAP_DSP_MEM_IOCTL_MMUINIT 9
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#define OMAP_DSP_MEM_IOCTL_KMEM_RESERVE 11
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#define OMAP_DSP_MEM_IOCTL_KMEM_RELEASE 12
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struct omap_dsp_mapinfo {
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unsigned long dspadr;
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unsigned long size;
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};
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/*
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* for /dev/dspctl/twch
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*/
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#define OMAP_DSP_TWCH_IOCTL_MKDEV 1
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#define OMAP_DSP_TWCH_IOCTL_RMDEV 2
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#define OMAP_DSP_TWCH_IOCTL_TADD 11
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#define OMAP_DSP_TWCH_IOCTL_TDEL 12
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#define OMAP_DSP_TWCH_IOCTL_TKILL 13
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#define OMAP_DSP_DEVSTATE_NOTASK 0x00000001
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#define OMAP_DSP_DEVSTATE_ATTACHED 0x00000002
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#define OMAP_DSP_DEVSTATE_GARBAGE 0x00000004
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#define OMAP_DSP_DEVSTATE_INVALID 0x00000008
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#define OMAP_DSP_DEVSTATE_ADDREQ 0x00000100
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#define OMAP_DSP_DEVSTATE_DELREQ 0x00000200
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#define OMAP_DSP_DEVSTATE_ADDFAIL 0x00001000
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#define OMAP_DSP_DEVSTATE_ADDING 0x00010000
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#define OMAP_DSP_DEVSTATE_DELING 0x00020000
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#define OMAP_DSP_DEVSTATE_KILLING 0x00040000
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#define OMAP_DSP_DEVSTATE_STATE_MASK 0x7fffffff
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#define OMAP_DSP_DEVSTATE_STALE 0x80000000
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struct omap_dsp_taddinfo {
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unsigned char minor;
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unsigned long taskadr;
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};
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#define OMAP_DSP_TADD_ABORTADR 0xffffffff
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/*
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* error cause definition (for error detection device)
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*/
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#define OMAP_DSP_ERRDT_WDT 0x00000001
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#define OMAP_DSP_ERRDT_MMU 0x00000002
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/*
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* mailbox protocol definitions
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*/
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struct omap_dsp_mailbox_cmd {
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unsigned short cmd;
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unsigned short data;
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};
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struct omap_dsp_reginfo {
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unsigned short adr;
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unsigned short val;
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};
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struct omap_dsp_varinfo {
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unsigned char varid;
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unsigned short val[0];
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};
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#define OMAP_DSP_MBPROT_REVISION 0x0019
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#define OMAP_DSP_MBCMD_WDSND 0x10
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#define OMAP_DSP_MBCMD_WDREQ 0x11
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#define OMAP_DSP_MBCMD_BKSND 0x20
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#define OMAP_DSP_MBCMD_BKREQ 0x21
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#define OMAP_DSP_MBCMD_BKYLD 0x23
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#define OMAP_DSP_MBCMD_BKSNDP 0x24
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#define OMAP_DSP_MBCMD_BKREQP 0x25
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#define OMAP_DSP_MBCMD_TCTL 0x30
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#define OMAP_DSP_MBCMD_TCTLDATA 0x31
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#define OMAP_DSP_MBCMD_POLL 0x32
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#define OMAP_DSP_MBCMD_WDT 0x50 /* v3.3: obsolete */
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#define OMAP_DSP_MBCMD_RUNLEVEL 0x51
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#define OMAP_DSP_MBCMD_PM 0x52
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#define OMAP_DSP_MBCMD_SUSPEND 0x53
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#define OMAP_DSP_MBCMD_KFUNC 0x54
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#define OMAP_DSP_MBCMD_TCFG 0x60
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#define OMAP_DSP_MBCMD_TADD 0x62
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#define OMAP_DSP_MBCMD_TDEL 0x63
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#define OMAP_DSP_MBCMD_TSTOP 0x65
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#define OMAP_DSP_MBCMD_DSPCFG 0x70
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#define OMAP_DSP_MBCMD_REGRW 0x72
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#define OMAP_DSP_MBCMD_GETVAR 0x74
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#define OMAP_DSP_MBCMD_SETVAR 0x75
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#define OMAP_DSP_MBCMD_ERR 0x78
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#define OMAP_DSP_MBCMD_DBG 0x79
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#define OMAP_DSP_MBCMD_TCTL_TINIT 0x0000
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#define OMAP_DSP_MBCMD_TCTL_TEN 0x0001
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#define OMAP_DSP_MBCMD_TCTL_TDIS 0x0002
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#define OMAP_DSP_MBCMD_TCTL_TCLR 0x0003
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#define OMAP_DSP_MBCMD_TCTL_TCLR_FORCE 0x0004
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#define OMAP_DSP_MBCMD_RUNLEVEL_USER 0x01
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#define OMAP_DSP_MBCMD_RUNLEVEL_SUPER 0x0e
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#define OMAP_DSP_MBCMD_RUNLEVEL_RECOVERY 0x10
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#define OMAP_DSP_MBCMD_PM_DISABLE 0x00
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#define OMAP_DSP_MBCMD_PM_ENABLE 0x01
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#define OMAP_DSP_MBCMD_KFUNC_FBCTL 0x00
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#define OMAP_DSP_MBCMD_FBCTL_ENABLE 0x0002
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#define OMAP_DSP_MBCMD_FBCTL_DISABLE 0x0003
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#define OMAP_DSP_MBCMD_TDEL_SAFE 0x0000
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#define OMAP_DSP_MBCMD_TDEL_KILL 0x0001
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#define OMAP_DSP_MBCMD_DSPCFG_REQ 0x00
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#define OMAP_DSP_MBCMD_DSPCFG_SYSADRH 0x28
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#define OMAP_DSP_MBCMD_DSPCFG_SYSADRL 0x29
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#define OMAP_DSP_MBCMD_DSPCFG_PROTREV 0x70
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#define OMAP_DSP_MBCMD_DSPCFG_ABORT 0x78
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#define OMAP_DSP_MBCMD_DSPCFG_LAST 0x80
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#define OMAP_DSP_MBCMD_REGRW_MEMR 0x00
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#define OMAP_DSP_MBCMD_REGRW_MEMW 0x01
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#define OMAP_DSP_MBCMD_REGRW_IOR 0x02
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#define OMAP_DSP_MBCMD_REGRW_IOW 0x03
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#define OMAP_DSP_MBCMD_REGRW_DATA 0x04
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#define OMAP_DSP_MBCMD_VARID_ICRMASK 0x00
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#define OMAP_DSP_MBCMD_VARID_LOADINFO 0x01
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#define OMAP_DSP_TTYP_ARCV 0x0001
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#define OMAP_DSP_TTYP_ASND 0x0002
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#define OMAP_DSP_TTYP_BKMD 0x0004
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#define OMAP_DSP_TTYP_BKDM 0x0008
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#define OMAP_DSP_TTYP_PVMD 0x0010
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#define OMAP_DSP_TTYP_PVDM 0x0020
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#define OMAP_DSP_EID_BADTID 0x10
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#define OMAP_DSP_EID_BADTCN 0x11
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#define OMAP_DSP_EID_BADBID 0x20
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#define OMAP_DSP_EID_BADCNT 0x21
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#define OMAP_DSP_EID_NOTLOCKED 0x22
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#define OMAP_DSP_EID_STVBUF 0x23
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#define OMAP_DSP_EID_BADADR 0x24
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#define OMAP_DSP_EID_BADTCTL 0x30
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#define OMAP_DSP_EID_BADPARAM 0x50
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#define OMAP_DSP_EID_FATAL 0x58
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#define OMAP_DSP_EID_NOMEM 0xc0
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#define OMAP_DSP_EID_NORES 0xc1
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#define OMAP_DSP_EID_IPBFULL 0xc2
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#define OMAP_DSP_EID_WDT 0xd0
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#define OMAP_DSP_EID_TASKNOTRDY 0xe0
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#define OMAP_DSP_EID_TASKBSY 0xe1
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#define OMAP_DSP_EID_TASKERR 0xef
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#define OMAP_DSP_EID_BADCFGTYP 0xf0
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#define OMAP_DSP_EID_DEBUG 0xf8
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#define OMAP_DSP_EID_BADSEQ 0xfe
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#define OMAP_DSP_EID_BADCMD 0xff
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#define OMAP_DSP_TNM_LEN 16
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#define OMAP_DSP_TID_FREE 0xff
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#define OMAP_DSP_TID_ANON 0xfe
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#define OMAP_DSP_BID_NULL 0xffff
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#define OMAP_DSP_BID_PVT 0xfffe
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#endif /* ASM_ARCH_DSP_H */
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