1beb6a7d6c
This adds some very basic support for the new machines, including the Quad G5 (tested), and other new dual core based machines and iMac G5 iSight (untested). This is still experimental ! There is no thermal control yet, there is no proper handing of MSIs, etc.. but it boots, I have all 4 cores up on my machine. Compared to the previous version of this patch, this one adds DART IOMMU support for the U4 chipset and thus should work fine on setups with more than 2Gb of RAM. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
288 lines
7.0 KiB
C
288 lines
7.0 KiB
C
/*
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* Maple (970 eval board) setup code
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*
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* (c) Copyright 2004 Benjamin Herrenschmidt (benh@kernel.crashing.org),
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* IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#define DEBUG
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/major.h>
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#include <linux/initrd.h>
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#include <linux/vt_kern.h>
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#include <linux/console.h>
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#include <linux/ide.h>
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#include <linux/pci.h>
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#include <linux/adb.h>
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#include <linux/cuda.h>
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#include <linux/pmu.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/serial.h>
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#include <linux/smp.h>
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#include <asm/processor.h>
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#include <asm/sections.h>
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#include <asm/prom.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/bitops.h>
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#include <asm/io.h>
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#include <asm/kexec.h>
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#include <asm/pci-bridge.h>
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#include <asm/iommu.h>
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#include <asm/machdep.h>
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#include <asm/dma.h>
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#include <asm/cputable.h>
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#include <asm/time.h>
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#include <asm/of_device.h>
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#include <asm/lmb.h>
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#include <asm/mpic.h>
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#include <asm/udbg.h>
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#include "maple.h"
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#ifdef DEBUG
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#define DBG(fmt...) udbg_printf(fmt)
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#else
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#define DBG(fmt...)
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#endif
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extern void generic_find_legacy_serial_ports(u64 *physport,
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unsigned int *default_speed);
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static void maple_restart(char *cmd)
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{
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unsigned int maple_nvram_base;
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unsigned int maple_nvram_offset;
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unsigned int maple_nvram_command;
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struct device_node *rtcs;
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/* find NVRAM device */
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rtcs = find_compatible_devices("nvram", "AMD8111");
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if (rtcs && rtcs->addrs) {
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maple_nvram_base = rtcs->addrs[0].address;
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} else {
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printk(KERN_EMERG "Maple: Unable to find NVRAM\n");
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printk(KERN_EMERG "Maple: Manual Restart Required\n");
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return;
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}
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/* find service processor device */
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rtcs = find_devices("service-processor");
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if (!rtcs) {
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printk(KERN_EMERG "Maple: Unable to find Service Processor\n");
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printk(KERN_EMERG "Maple: Manual Restart Required\n");
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return;
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}
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maple_nvram_offset = *(unsigned int*) get_property(rtcs,
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"restart-addr", NULL);
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maple_nvram_command = *(unsigned int*) get_property(rtcs,
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"restart-value", NULL);
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/* send command */
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outb_p(maple_nvram_command, maple_nvram_base + maple_nvram_offset);
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for (;;) ;
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}
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static void maple_power_off(void)
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{
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unsigned int maple_nvram_base;
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unsigned int maple_nvram_offset;
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unsigned int maple_nvram_command;
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struct device_node *rtcs;
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/* find NVRAM device */
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rtcs = find_compatible_devices("nvram", "AMD8111");
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if (rtcs && rtcs->addrs) {
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maple_nvram_base = rtcs->addrs[0].address;
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} else {
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printk(KERN_EMERG "Maple: Unable to find NVRAM\n");
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printk(KERN_EMERG "Maple: Manual Power-Down Required\n");
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return;
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}
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/* find service processor device */
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rtcs = find_devices("service-processor");
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if (!rtcs) {
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printk(KERN_EMERG "Maple: Unable to find Service Processor\n");
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printk(KERN_EMERG "Maple: Manual Power-Down Required\n");
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return;
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}
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maple_nvram_offset = *(unsigned int*) get_property(rtcs,
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"power-off-addr", NULL);
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maple_nvram_command = *(unsigned int*) get_property(rtcs,
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"power-off-value", NULL);
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/* send command */
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outb_p(maple_nvram_command, maple_nvram_base + maple_nvram_offset);
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for (;;) ;
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}
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static void maple_halt(void)
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{
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maple_power_off();
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}
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#ifdef CONFIG_SMP
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struct smp_ops_t maple_smp_ops = {
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.probe = smp_mpic_probe,
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.message_pass = smp_mpic_message_pass,
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.kick_cpu = smp_generic_kick_cpu,
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.setup_cpu = smp_mpic_setup_cpu,
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.give_timebase = smp_generic_give_timebase,
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.take_timebase = smp_generic_take_timebase,
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};
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#endif /* CONFIG_SMP */
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void __init maple_setup_arch(void)
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{
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/* init to some ~sane value until calibrate_delay() runs */
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loops_per_jiffy = 50000000;
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/* Setup SMP callback */
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#ifdef CONFIG_SMP
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smp_ops = &maple_smp_ops;
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#endif
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/* Lookup PCI hosts */
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maple_pci_init();
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#ifdef CONFIG_DUMMY_CONSOLE
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conswitchp = &dummy_con;
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#endif
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printk(KERN_INFO "Using native/NAP idle loop\n");
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}
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/*
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* Early initialization.
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*/
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static void __init maple_init_early(void)
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{
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unsigned int default_speed;
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u64 physport;
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DBG(" -> maple_init_early\n");
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/* Initialize hash table, from now on, we can take hash faults
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* and call ioremap
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*/
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hpte_init_native();
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/* Setup interrupt mapping options */
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ppc64_interrupt_controller = IC_OPEN_PIC;
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iommu_init_early_dart();
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DBG(" <- maple_init_early\n");
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}
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static __init void maple_init_IRQ(void)
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{
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struct device_node *root;
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unsigned int *opprop;
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unsigned long opic_addr;
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struct mpic *mpic;
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unsigned char senses[128];
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int n;
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DBG(" -> maple_init_IRQ\n");
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/* XXX: Non standard, replace that with a proper openpic/mpic node
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* in the device-tree. Find the Open PIC if present */
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root = of_find_node_by_path("/");
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opprop = (unsigned int *) get_property(root,
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"platform-open-pic", NULL);
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if (opprop == 0)
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panic("OpenPIC not found !\n");
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n = prom_n_addr_cells(root);
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for (opic_addr = 0; n > 0; --n)
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opic_addr = (opic_addr << 32) + *opprop++;
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of_node_put(root);
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/* Obtain sense values from device-tree */
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prom_get_irq_senses(senses, 0, 128);
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mpic = mpic_alloc(opic_addr,
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MPIC_PRIMARY | MPIC_BIG_ENDIAN |
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MPIC_BROKEN_U3 | MPIC_WANTS_RESET,
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0, 0, 128, 128, senses, 128, "U3-MPIC");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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DBG(" <- maple_init_IRQ\n");
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}
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static void __init maple_progress(char *s, unsigned short hex)
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{
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printk("*** %04x : %s\n", hex, s ? s : "");
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}
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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static int __init maple_probe(int platform)
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{
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if (platform != PLATFORM_MAPLE)
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return 0;
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/*
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* On U3, the DART (iommu) must be allocated now since it
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* has an impact on htab_initialize (due to the large page it
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* occupies having to be broken up so the DART itself is not
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* part of the cacheable linar mapping
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*/
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alloc_dart_table();
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return 1;
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}
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struct machdep_calls __initdata maple_md = {
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.probe = maple_probe,
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.setup_arch = maple_setup_arch,
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.init_early = maple_init_early,
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.init_IRQ = maple_init_IRQ,
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.get_irq = mpic_get_irq,
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.pcibios_fixup = maple_pcibios_fixup,
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.pci_get_legacy_ide_irq = maple_pci_get_legacy_ide_irq,
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.restart = maple_restart,
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.power_off = maple_power_off,
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.halt = maple_halt,
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.get_boot_time = maple_get_boot_time,
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.set_rtc_time = maple_set_rtc_time,
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.get_rtc_time = maple_get_rtc_time,
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.calibrate_decr = generic_calibrate_decr,
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.progress = maple_progress,
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.idle_loop = native_idle,
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#ifdef CONFIG_KEXEC
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.machine_kexec = default_machine_kexec,
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.machine_kexec_prepare = default_machine_kexec_prepare,
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.machine_crash_shutdown = default_machine_crash_shutdown,
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#endif
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};
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