b76c8b19b0
This way the initcalls don't run on other SoCs on multiplatform kernels. Otherwise we'll get something like this when booting on vexpress: omap_hwmod: _ensure_mpu_hwmod_is_setup: MPU initiator hwmod mpu not yet registered ... WARNING: at arch/arm/mach-omap2/pm.c:82 _init_omap_device+0x74/0x94() _init_omap_device: could not find omap_hwmod for mpu ... omap-dma-engine omap-dma-engine: OMAP DMA engine driver ... Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
181 lines
7.3 KiB
C
181 lines
7.3 KiB
C
/*
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* OMAP4 OPP table definitions.
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*
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* Copyright (C) 2010-2012 Texas Instruments Incorporated - http://www.ti.com/
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* Nishanth Menon
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* Kevin Hilman
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* Thara Gopinath
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* Copyright (C) 2010-2011 Nokia Corporation.
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* Eduardo Valentin
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include "soc.h"
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#include "control.h"
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#include "omap_opp_data.h"
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#include "pm.h"
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/*
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* Structures containing OMAP4430 voltage supported and various
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* voltage dependent data for each VDD.
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*/
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#define OMAP4430_VDD_MPU_OPP50_UV 1025000
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#define OMAP4430_VDD_MPU_OPP100_UV 1200000
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#define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000
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#define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000
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struct omap_volt_data omap443x_vdd_mpu_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
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VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
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VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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#define OMAP4430_VDD_IVA_OPP50_UV 1013000
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#define OMAP4430_VDD_IVA_OPP100_UV 1188000
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#define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000
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struct omap_volt_data omap443x_vdd_iva_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
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VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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#define OMAP4430_VDD_CORE_OPP50_UV 1025000
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#define OMAP4430_VDD_CORE_OPP100_UV 1200000
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struct omap_volt_data omap443x_vdd_core_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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static struct omap_opp_def __initdata omap443x_opp_def_list[] = {
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/* MPU OPP1 - OPP50 */
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OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
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/* MPU OPP2 - OPP100 */
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OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
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/* MPU OPP3 - OPP-Turbo */
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OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
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/* MPU OPP4 - OPP-SB */
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OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
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/* L3 OPP1 - OPP50 */
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OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
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/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
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OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
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/* IVA OPP1 - OPP50 */
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OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
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/* IVA OPP2 - OPP100 */
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OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
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/* IVA OPP3 - OPP-Turbo */
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OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
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/* TODO: add DSP, aess, fdif, gpu */
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};
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#define OMAP4460_VDD_MPU_OPP50_UV 1025000
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#define OMAP4460_VDD_MPU_OPP100_UV 1200000
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#define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000
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#define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000
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struct omap_volt_data omap446x_vdd_mpu_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
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VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
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VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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#define OMAP4460_VDD_IVA_OPP50_UV 1025000
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#define OMAP4460_VDD_IVA_OPP100_UV 1200000
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#define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000
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#define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000
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struct omap_volt_data omap446x_vdd_iva_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
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VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
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VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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#define OMAP4460_VDD_CORE_OPP50_UV 1025000
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#define OMAP4460_VDD_CORE_OPP100_UV 1200000
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#define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000
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struct omap_volt_data omap446x_vdd_core_volt_data[] = {
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VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
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VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
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VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16),
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VOLT_DATA_DEFINE(0, 0, 0, 0),
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};
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static struct omap_opp_def __initdata omap446x_opp_def_list[] = {
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/* MPU OPP1 - OPP50 */
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OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV),
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/* MPU OPP2 - OPP100 */
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OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV),
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/* MPU OPP3 - OPP-Turbo */
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OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV),
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/*
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* MPU OPP4 - OPP-Nitro + Disabled as the reference schematics
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* recommends TPS623631 - confirm and enable the opp in board file
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* XXX: May be we should enable these based on mpu capability and
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* Exception board files disable it...
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*/
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OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV),
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/* MPU OPP4 - OPP-Nitro SpeedBin */
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OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV),
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/* L3 OPP1 - OPP50 */
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OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV),
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/* L3 OPP2 - OPP100 */
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OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV),
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/* IVA OPP1 - OPP50 */
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OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV),
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/* IVA OPP2 - OPP100 */
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OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV),
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/*
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* IVA OPP3 - OPP-Turbo + Disabled as the reference schematics
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* recommends Phoenix VCORE2 which can supply only 600mA - so the ones
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* above this OPP frequency, even though OMAP is capable, should be
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* enabled by board file which is sure of the chip power capability
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*/
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OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV),
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/* IVA OPP4 - OPP-Nitro */
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OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV),
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/* IVA OPP5 - OPP-Nitro SpeedBin*/
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OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV),
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/* TODO: add DSP, aess, fdif, gpu */
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};
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/**
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* omap4_opp_init() - initialize omap4 opp table
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*/
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int __init omap4_opp_init(void)
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{
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int r = -ENODEV;
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if (cpu_is_omap443x())
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r = omap_init_opp_table(omap443x_opp_def_list,
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ARRAY_SIZE(omap443x_opp_def_list));
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else if (cpu_is_omap446x())
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r = omap_init_opp_table(omap446x_opp_def_list,
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ARRAY_SIZE(omap446x_opp_def_list));
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return r;
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}
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omap_device_initcall(omap4_opp_init);
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