65f2e753f1
This reverts commit 5dd7bf59e0.
Conflicts:
scripts/mod/file2alias.c
This change is wrong on many levels. First and foremost, it causes a
regression. On boot on Assabet, which this patch gives a codec id of
'ucb1x00', it gives:
ucb1x00 ID not found: 1005
0x1005 is a valid ID for the UCB1300 device.
Secondly, this patch is way over the top in terms of complexity. The
only device which has been seen to be connected with this MCP code is
the UCB1x00 (UCB1200, UCB1300 etc) devices, and they all use the same
driver. Adding a match table, requiring the codec string to match the
hardware ID read out of the ID register, etc is completely over the top
when we can just read the hardware ID register.
460 lines
11 KiB
C
460 lines
11 KiB
C
/*
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* linux/arch/arm/mach-sa1100/assabet.c
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*
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* Author: Nicolas Pitre
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*
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* This file contains all Assabet-specific tweaks.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/serial_core.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <linux/mm.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/irq.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/irda.h>
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#include <asm/mach/map.h>
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#include <asm/mach/serial_sa1100.h>
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#include <mach/assabet.h>
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#include <mach/mcp.h>
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#include "generic.h"
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#define ASSABET_BCR_DB1110 \
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(ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
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ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
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ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
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ASSABET_BCR_IRDA_MD0)
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#define ASSABET_BCR_DB1111 \
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(ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
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ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
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ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
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ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
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ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
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unsigned long SCR_value = ASSABET_SCR_INIT;
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EXPORT_SYMBOL(SCR_value);
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static unsigned long BCR_value = ASSABET_BCR_DB1110;
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void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
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{
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unsigned long flags;
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local_irq_save(flags);
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BCR_value = (BCR_value & ~mask) | val;
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ASSABET_BCR = BCR_value;
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(ASSABET_BCR_frob);
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static void assabet_backlight_power(int on)
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{
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#ifndef ASSABET_PAL_VIDEO
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if (on)
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ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
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else
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#endif
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ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
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}
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/*
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* Turn on/off the backlight. When turning the backlight on,
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* we wait 500us after turning it on so we don't cause the
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* supplies to droop when we enable the LCD controller (and
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* cause a hard reset.)
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*/
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static void assabet_lcd_power(int on)
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{
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#ifndef ASSABET_PAL_VIDEO
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if (on) {
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ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
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udelay(500);
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} else
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#endif
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ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
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}
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/*
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* Assabet flash support code.
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*/
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#ifdef ASSABET_REV_4
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/*
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* Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
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*/
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static struct mtd_partition assabet_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00020000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bootloader params",
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.size = 0x00020000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "jffs",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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#else
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/*
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* Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
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*/
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static struct mtd_partition assabet_partitions[] = {
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{
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.name = "bootloader",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "bootloader params",
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.size = 0x00040000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "jffs",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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#endif
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static struct flash_platform_data assabet_flash_data = {
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.map_name = "cfi_probe",
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.parts = assabet_partitions,
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.nr_parts = ARRAY_SIZE(assabet_partitions),
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};
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static struct resource assabet_flash_resources[] = {
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{
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.start = SA1100_CS0_PHYS,
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.end = SA1100_CS0_PHYS + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = SA1100_CS1_PHYS,
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.end = SA1100_CS1_PHYS + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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/*
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* Assabet IrDA support code.
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*/
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static int assabet_irda_set_power(struct device *dev, unsigned int state)
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{
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static unsigned int bcr_state[4] = {
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ASSABET_BCR_IRDA_MD0,
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ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
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ASSABET_BCR_IRDA_MD1,
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0
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};
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if (state < 4) {
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state = bcr_state[state];
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ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
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ASSABET_BCR_IRDA_MD0));
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ASSABET_BCR_set(state);
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}
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return 0;
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}
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static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
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{
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if (speed < 4000000)
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ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
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else
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ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
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}
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static struct irda_platform_data assabet_irda_data = {
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.set_power = assabet_irda_set_power,
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.set_speed = assabet_irda_set_speed,
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};
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static struct mcp_plat_data assabet_mcp_data = {
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.mccr0 = MCCR0_ADM,
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.sclk_rate = 11981000,
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};
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static void __init assabet_init(void)
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{
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/*
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* Ensure that the power supply is in "high power" mode.
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*/
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GPDR |= GPIO_GPIO16;
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GPSR = GPIO_GPIO16;
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/*
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* Ensure that these pins are set as outputs and are driving
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* logic 0. This ensures that we won't inadvertently toggle
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* the WS latch in the CPLD, and we don't float causing
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* excessive power drain. --rmk
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*/
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GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
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GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
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/*
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* Set up registers for sleep mode.
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*/
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PWER = PWER_GPIO0;
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PGSR = 0;
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PCFR = 0;
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PSDR = 0;
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PPDR |= PPC_TXD3 | PPC_TXD1;
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PPSR |= PPC_TXD3 | PPC_TXD1;
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sa1100fb_lcd_power = assabet_lcd_power;
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sa1100fb_backlight_power = assabet_backlight_power;
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if (machine_has_neponset()) {
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/*
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* Angel sets this, but other bootloaders may not.
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*
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* This must precede any driver calls to BCR_set()
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* or BCR_clear().
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*/
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ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
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#ifndef CONFIG_ASSABET_NEPONSET
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printk( "Warning: Neponset detected but full support "
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"hasn't been configured in the kernel\n" );
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#endif
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}
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sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
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ARRAY_SIZE(assabet_flash_resources));
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sa11x0_register_irda(&assabet_irda_data);
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sa11x0_register_mcp(&assabet_mcp_data);
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}
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/*
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* On Assabet, we must probe for the Neponset board _before_
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* paging_init() has occurred to actually determine the amount
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* of RAM available. To do so, we map the appropriate IO section
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* in the page table here in order to access GPIO registers.
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*/
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static void __init map_sa1100_gpio_regs( void )
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{
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unsigned long phys = __PREG(GPLR) & PMD_MASK;
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unsigned long virt = io_p2v(phys);
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int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
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pmd_t *pmd;
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pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
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*pmd = __pmd(phys | prot);
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flush_pmd_entry(pmd);
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}
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/*
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* Read System Configuration "Register"
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* (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
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* User's Guide", section 4.4.1)
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*
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* This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
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* to set up the serial port for decompression status messages. We
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* repeat it here because the kernel may not be loaded as a zImage, and
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* also because it's a hassle to communicate the SCR value to the kernel
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* from the decompressor.
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*
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* Note that IRQs are guaranteed to be disabled.
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*/
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static void __init get_assabet_scr(void)
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{
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unsigned long scr, i;
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GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
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GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
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GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
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for(i = 100; i--; ) /* Read GPIO 9:2 */
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scr = GPLR;
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GPDR |= 0x3fc; /* restore correct pin direction */
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scr &= 0x3fc; /* save as system configuration byte. */
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SCR_value = scr;
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}
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static void __init
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fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
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{
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/* This must be done before any call to machine_has_neponset() */
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map_sa1100_gpio_regs();
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get_assabet_scr();
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if (machine_has_neponset())
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printk("Neponset expansion board detected\n");
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}
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static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
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{
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if (port->mapbase == _Ser1UTCR0) {
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if (state)
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ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
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ASSABET_BCR_COM_RTS |
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ASSABET_BCR_COM_DTR);
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else
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ASSABET_BCR_set(ASSABET_BCR_RS232EN |
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ASSABET_BCR_COM_RTS |
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ASSABET_BCR_COM_DTR);
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}
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}
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/*
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* Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
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* and UART3 (radio module). We only handle them for UART1 here.
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*/
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static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
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{
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if (port->mapbase == _Ser1UTCR0) {
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u_int set = 0, clear = 0;
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if (mctrl & TIOCM_RTS)
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clear |= ASSABET_BCR_COM_RTS;
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else
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set |= ASSABET_BCR_COM_RTS;
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if (mctrl & TIOCM_DTR)
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clear |= ASSABET_BCR_COM_DTR;
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else
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set |= ASSABET_BCR_COM_DTR;
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ASSABET_BCR_clear(clear);
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ASSABET_BCR_set(set);
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}
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}
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static u_int assabet_get_mctrl(struct uart_port *port)
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{
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u_int ret = 0;
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u_int bsr = ASSABET_BSR;
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/* need 2 reads to read current value */
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bsr = ASSABET_BSR;
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if (port->mapbase == _Ser1UTCR0) {
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if (bsr & ASSABET_BSR_COM_DCD)
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ret |= TIOCM_CD;
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if (bsr & ASSABET_BSR_COM_CTS)
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ret |= TIOCM_CTS;
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if (bsr & ASSABET_BSR_COM_DSR)
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ret |= TIOCM_DSR;
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} else if (port->mapbase == _Ser3UTCR0) {
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if (bsr & ASSABET_BSR_RAD_DCD)
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ret |= TIOCM_CD;
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if (bsr & ASSABET_BSR_RAD_CTS)
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ret |= TIOCM_CTS;
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if (bsr & ASSABET_BSR_RAD_DSR)
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ret |= TIOCM_DSR;
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if (bsr & ASSABET_BSR_RAD_RI)
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ret |= TIOCM_RI;
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} else {
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ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
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}
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return ret;
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}
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static struct sa1100_port_fns assabet_port_fns __initdata = {
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.set_mctrl = assabet_set_mctrl,
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.get_mctrl = assabet_get_mctrl,
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.pm = assabet_uart_pm,
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};
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static struct map_desc assabet_io_desc[] __initdata = {
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{ /* Board Control Register */
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.virtual = 0xf1000000,
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.pfn = __phys_to_pfn(0x12000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* MQ200 */
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.virtual = 0xf2800000,
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.pfn = __phys_to_pfn(0x4b800000),
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.length = 0x00800000,
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.type = MT_DEVICE
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}
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};
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static void __init assabet_map_io(void)
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{
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sa1100_map_io();
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iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
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/*
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* Set SUS bit in SDCR0 so serial port 1 functions.
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* Its called GPCLKR0 in my SA1110 manual.
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*/
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Ser1SDCR0 |= SDCR0_SUS;
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if (machine_has_neponset()) {
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#ifdef CONFIG_ASSABET_NEPONSET
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extern void neponset_map_io(void);
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/*
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* We map Neponset registers even if it isn't present since
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* many drivers will try to probe their stuff (and fail).
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* This is still more friendly than a kernel paging request
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* crash.
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*/
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neponset_map_io();
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#endif
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} else {
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sa1100_register_uart_fns(&assabet_port_fns);
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}
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/*
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* When Neponset is attached, the first UART should be
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* UART3. That's what Angel is doing and many documents
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* are stating this.
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*
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* We do the Neponset mapping even if Neponset support
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* isn't compiled in so the user will still get something on
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* the expected physical serial port.
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*
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* We no longer do this; not all boot loaders support it,
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* and UART3 appears to be somewhat unreliable with blob.
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*/
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sa1100_register_uart(0, 1);
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sa1100_register_uart(2, 3);
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}
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MACHINE_START(ASSABET, "Intel-Assabet")
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.atag_offset = 0x100,
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.fixup = fixup_assabet,
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.map_io = assabet_map_io,
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.init_irq = sa1100_init_irq,
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.timer = &sa1100_timer,
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.init_machine = assabet_init,
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#ifdef CONFIG_SA1111
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.dma_zone_size = SZ_1M,
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#endif
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.restart = sa11x0_restart,
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MACHINE_END
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