1902a9e62b
In the near future, the driver core is going to not allow direct access to the driver_data pointer in struct device. Instead, the functions dev_get_drvdata() and dev_set_drvdata() should be used. These functions have been around since the beginning, so are backwards compatible with all older kernel versions. Cc: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
475 lines
13 KiB
C
475 lines
13 KiB
C
/*
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* Core driver for WM8400.
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*
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* Copyright 2008 Wolfson Microelectronics PLC.
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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*/
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#include <linux/bug.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/wm8400-private.h>
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#include <linux/mfd/wm8400-audio.h>
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static struct {
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u16 readable; /* Mask of readable bits */
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u16 writable; /* Mask of writable bits */
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u16 vol; /* Mask of volatile bits */
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int is_codec; /* Register controlled by codec reset */
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u16 default_val; /* Value on reset */
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} reg_data[] = {
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
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{ 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
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{ 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
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{ 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
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{ 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
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{ 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
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{ 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
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{ 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
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{ 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
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{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
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{ 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
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{ 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
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{ 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
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{ 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
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{ 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
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{ 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
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{ 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
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{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
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{ 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
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{ 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
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{ 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
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{ 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
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{ 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
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{ 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
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{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
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{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
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{ 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
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{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
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{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
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{ 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
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{ 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
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{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
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{ 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
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{ 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
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{ 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
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{ 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
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{ 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
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{ 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
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{ 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
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{ 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
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{ 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
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{ 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
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{ 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
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{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
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{ 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
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{ 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
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{ 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
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{ 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
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{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
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{ 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
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{ 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
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{ 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
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{ 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
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{ 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
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};
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static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
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{
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int i, ret = 0;
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BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
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/* If there are any volatile reads then read back the entire block */
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for (i = reg; i < reg + num_regs; i++)
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if (reg_data[i].vol) {
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ret = wm8400->read_dev(wm8400->io_data, reg,
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num_regs, dest);
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if (ret != 0)
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return ret;
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for (i = 0; i < num_regs; i++)
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dest[i] = be16_to_cpu(dest[i]);
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return 0;
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}
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/* Otherwise use the cache */
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memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
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return 0;
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}
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static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
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u16 *src)
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{
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int ret, i;
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BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
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for (i = 0; i < num_regs; i++) {
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BUG_ON(!reg_data[reg + i].writable);
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wm8400->reg_cache[reg + i] = src[i];
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src[i] = cpu_to_be16(src[i]);
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}
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/* Do the actual I/O */
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ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
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if (ret != 0)
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return -EIO;
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return 0;
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}
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/**
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* wm8400_reg_read - Single register read
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*
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* @wm8400: Pointer to wm8400 control structure
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* @reg: Register to read
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*
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* @return Read value
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*/
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u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
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{
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u16 val;
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mutex_lock(&wm8400->io_lock);
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wm8400_read(wm8400, reg, 1, &val);
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mutex_unlock(&wm8400->io_lock);
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return val;
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}
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EXPORT_SYMBOL_GPL(wm8400_reg_read);
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int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
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{
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int ret;
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mutex_lock(&wm8400->io_lock);
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ret = wm8400_read(wm8400, reg, count, data);
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mutex_unlock(&wm8400->io_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8400_block_read);
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/**
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* wm8400_set_bits - Bitmask write
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*
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* @wm8400: Pointer to wm8400 control structure
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* @reg: Register to access
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* @mask: Mask of bits to change
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* @val: Value to set for masked bits
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*/
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int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
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{
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u16 tmp;
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int ret;
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mutex_lock(&wm8400->io_lock);
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ret = wm8400_read(wm8400, reg, 1, &tmp);
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tmp = (tmp & ~mask) | val;
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if (ret == 0)
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ret = wm8400_write(wm8400, reg, 1, &tmp);
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mutex_unlock(&wm8400->io_lock);
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return ret;
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}
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EXPORT_SYMBOL_GPL(wm8400_set_bits);
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/**
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* wm8400_reset_codec_reg_cache - Reset cached codec registers to
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* their default values.
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*/
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void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
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{
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int i;
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mutex_lock(&wm8400->io_lock);
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/* Reset all codec registers to their initial value */
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for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
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if (reg_data[i].is_codec)
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wm8400->reg_cache[i] = reg_data[i].default_val;
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mutex_unlock(&wm8400->io_lock);
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}
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EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
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static int wm8400_register_codec(struct wm8400 *wm8400)
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{
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struct mfd_cell cell = {
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.name = "wm8400-codec",
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.driver_data = wm8400,
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};
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return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
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}
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/*
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* wm8400_init - Generic initialisation
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*
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* The WM8400 can be configured as either an I2C or SPI device. Probe
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* functions for each bus set up the accessors then call into this to
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* set up the device itself.
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*/
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static int wm8400_init(struct wm8400 *wm8400,
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struct wm8400_platform_data *pdata)
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{
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u16 reg;
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int ret, i;
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mutex_init(&wm8400->io_lock);
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dev_set_drvdata(wm8400->dev, wm8400);
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/* Check that this is actually a WM8400 */
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ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, ®);
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if (ret != 0) {
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dev_err(wm8400->dev, "Chip ID register read failed\n");
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return -EIO;
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}
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if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
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dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
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be16_to_cpu(reg));
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return -ENODEV;
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}
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/* We don't know what state the hardware is in and since this
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* is a PMIC we can't reset it safely so initialise the register
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* cache from the hardware.
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*/
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ret = wm8400->read_dev(wm8400->io_data, 0,
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ARRAY_SIZE(wm8400->reg_cache),
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wm8400->reg_cache);
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if (ret != 0) {
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dev_err(wm8400->dev, "Register cache read failed\n");
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return -EIO;
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}
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for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
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wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
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/* If the codec is in reset use hard coded values */
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if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
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for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
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if (reg_data[i].is_codec)
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wm8400->reg_cache[i] = reg_data[i].default_val;
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ret = wm8400_read(wm8400, WM8400_ID, 1, ®);
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if (ret != 0) {
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dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
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return ret;
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}
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reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
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dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
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ret = wm8400_register_codec(wm8400);
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if (ret != 0) {
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dev_err(wm8400->dev, "Failed to register codec\n");
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goto err_children;
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}
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if (pdata && pdata->platform_init) {
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ret = pdata->platform_init(wm8400->dev);
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if (ret != 0) {
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dev_err(wm8400->dev, "Platform init failed: %d\n",
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ret);
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goto err_children;
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}
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} else
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dev_warn(wm8400->dev, "No platform initialisation supplied\n");
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return 0;
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err_children:
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mfd_remove_devices(wm8400->dev);
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return ret;
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}
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static void wm8400_release(struct wm8400 *wm8400)
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{
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mfd_remove_devices(wm8400->dev);
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}
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#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
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static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
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{
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struct i2c_client *i2c = io_data;
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struct i2c_msg xfer[2];
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int ret;
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/* Write register */
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xfer[0].addr = i2c->addr;
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xfer[0].flags = 0;
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xfer[0].len = 1;
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xfer[0].buf = ®
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/* Read data */
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xfer[1].addr = i2c->addr;
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xfer[1].flags = I2C_M_RD;
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xfer[1].len = count * sizeof(u16);
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xfer[1].buf = (u8 *)dest;
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ret = i2c_transfer(i2c->adapter, xfer, 2);
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if (ret == 2)
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ret = 0;
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else if (ret >= 0)
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ret = -EIO;
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return ret;
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}
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static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
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{
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struct i2c_client *i2c = io_data;
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u8 *msg;
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int ret;
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/* We add 1 byte for device register - ideally I2C would gather. */
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msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
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if (msg == NULL)
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return -ENOMEM;
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msg[0] = reg;
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memcpy(&msg[1], src, count * sizeof(u16));
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ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
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if (ret == (count * 2) + 1)
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ret = 0;
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else if (ret >= 0)
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ret = -EIO;
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kfree(msg);
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return ret;
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}
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static int wm8400_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *id)
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{
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struct wm8400 *wm8400;
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int ret;
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wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
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if (wm8400 == NULL) {
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ret = -ENOMEM;
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goto err;
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}
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wm8400->io_data = i2c;
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wm8400->read_dev = wm8400_i2c_read;
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wm8400->write_dev = wm8400_i2c_write;
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wm8400->dev = &i2c->dev;
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i2c_set_clientdata(i2c, wm8400);
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ret = wm8400_init(wm8400, i2c->dev.platform_data);
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if (ret != 0)
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goto struct_err;
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return 0;
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struct_err:
|
|
i2c_set_clientdata(i2c, NULL);
|
|
kfree(wm8400);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static int wm8400_i2c_remove(struct i2c_client *i2c)
|
|
{
|
|
struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
|
|
|
|
wm8400_release(wm8400);
|
|
i2c_set_clientdata(i2c, NULL);
|
|
kfree(wm8400);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id wm8400_i2c_id[] = {
|
|
{ "wm8400", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
|
|
|
|
static struct i2c_driver wm8400_i2c_driver = {
|
|
.driver = {
|
|
.name = "WM8400",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = wm8400_i2c_probe,
|
|
.remove = wm8400_i2c_remove,
|
|
.id_table = wm8400_i2c_id,
|
|
};
|
|
#endif
|
|
|
|
static int __init wm8400_module_init(void)
|
|
{
|
|
int ret = -ENODEV;
|
|
|
|
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
|
ret = i2c_add_driver(&wm8400_i2c_driver);
|
|
if (ret != 0)
|
|
pr_err("Failed to register I2C driver: %d\n", ret);
|
|
#endif
|
|
|
|
return ret;
|
|
}
|
|
module_init(wm8400_module_init);
|
|
|
|
static void __exit wm8400_module_exit(void)
|
|
{
|
|
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
|
i2c_del_driver(&wm8400_i2c_driver);
|
|
#endif
|
|
}
|
|
module_exit(wm8400_module_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
|