8dfe8f29cd
Generate a new set of OCD register definitions in asm/ocd.h and rename __mfdr() and __mtdr() to ocd_read() and ocd_write() respectively. The bitfield definitions are a lot more complete now, and they are entirely based on bit numbers, not masks. This is because OCD registers are frequently accessed from assembly code, where bit numbers are a lot more useful (can be fed directly to sbr, bfins, etc.) Bitfields that consist of more than one bit have two definitions: _START, which indicates the number of the first bit, and _SIZE, which indicates the number of bits. These directly correspond to the parameters taken by the bfextu, bfexts and bfins instructions. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
156 lines
3.9 KiB
C
156 lines
3.9 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_SYSTEM_H
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#define __ASM_AVR32_SYSTEM_H
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#include <linux/compiler.h>
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#include <linux/linkage.h>
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#include <linux/types.h>
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#include <asm/ptrace.h>
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#include <asm/sysreg.h>
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#define xchg(ptr,x) \
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((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
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#define nop() asm volatile("nop")
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#define mb() asm volatile("" : : : "memory")
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#define rmb() mb()
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#define wmb() asm volatile("sync 0" : : : "memory")
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#define read_barrier_depends() do { } while(0)
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#define set_mb(var, value) do { var = value; mb(); } while(0)
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/*
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* Help PathFinder and other Nexus-compliant debuggers keep track of
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* the current PID by emitting an Ownership Trace Message each time we
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* switch task.
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*/
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#ifdef CONFIG_OWNERSHIP_TRACE
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#include <asm/ocd.h>
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#define finish_arch_switch(prev) \
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do { \
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ocd_write(PID, prev->pid); \
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ocd_write(PID, current->pid); \
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} while(0)
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#endif
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/*
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* switch_to(prev, next, last) should switch from task `prev' to task
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* `next'. `prev' will never be the same as `next'.
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*
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* We just delegate everything to the __switch_to assembly function,
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* which is implemented in arch/avr32/kernel/switch_to.S
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*
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* mb() tells GCC not to cache `current' across this call.
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*/
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struct cpu_context;
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struct task_struct;
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extern struct task_struct *__switch_to(struct task_struct *,
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struct cpu_context *,
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struct cpu_context *);
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#define switch_to(prev, next, last) \
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do { \
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last = __switch_to(prev, &prev->thread.cpu_context + 1, \
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&next->thread.cpu_context); \
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} while (0)
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#ifdef CONFIG_SMP
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# error "The AVR32 port does not support SMP"
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#else
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# define smp_mb() barrier()
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# define smp_rmb() barrier()
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# define smp_wmb() barrier()
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# define smp_read_barrier_depends() do { } while(0)
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#endif
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#include <linux/irqflags.h>
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extern void __xchg_called_with_bad_pointer(void);
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static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
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{
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u32 ret;
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asm volatile("xchg %[ret], %[m], %[val]"
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: [ret] "=&r"(ret), "=m"(*m)
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: "m"(*m), [m] "r"(m), [val] "r"(val)
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: "memory");
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return ret;
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}
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static inline unsigned long __xchg(unsigned long x,
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volatile void *ptr,
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int size)
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{
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switch(size) {
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case 4:
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return xchg_u32(x, ptr);
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default:
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__xchg_called_with_bad_pointer();
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return x;
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}
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}
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static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
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unsigned long new)
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{
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__u32 ret;
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asm volatile(
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"1: ssrf 5\n"
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" ld.w %[ret], %[m]\n"
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" cp.w %[ret], %[old]\n"
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" brne 2f\n"
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" stcond %[m], %[new]\n"
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" brne 1b\n"
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"2:\n"
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: [ret] "=&r"(ret), [m] "=m"(*m)
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: "m"(m), [old] "ir"(old), [new] "r"(new)
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: "memory", "cc");
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return ret;
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}
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extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
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volatile int * m, unsigned long old, unsigned long new);
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#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
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/* This function doesn't exist, so you'll get a linker error
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if something tries to do an invalid cmpxchg(). */
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extern void __cmpxchg_called_with_bad_pointer(void);
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#define __HAVE_ARCH_CMPXCHG 1
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static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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unsigned long new, int size)
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{
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switch (size) {
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case 4:
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return __cmpxchg_u32(ptr, old, new);
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case 8:
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return __cmpxchg_u64(ptr, old, new);
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}
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__cmpxchg_called_with_bad_pointer();
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return old;
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}
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#define cmpxchg(ptr, old, new) \
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((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \
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(unsigned long)(new), \
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sizeof(*(ptr))))
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struct pt_regs;
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void NORET_TYPE die(const char *str, struct pt_regs *regs, long err);
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void _exception(long signr, struct pt_regs *regs, int code,
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unsigned long addr);
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#define arch_align_stack(x) (x)
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#endif /* __ASM_AVR32_SYSTEM_H */
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