15754bf98f
The default ARMv4 method consisting of reading through some memory area isn't compatible with the cache replacement policy of some ARMv5TEJ compatible cache implementations. It is also a bit wasteful when a dedicated instruction can do the needed work optimally. It is hard to tell if all ARMv5TEJ cores will support the used CP15 instruction, but at least all those implementations Linux currently knows about (ARM926 and ARM1026) do support it. Tested on an OMAP1610 H2 target. Signed-off-by: Nicolas Pitre <nico@marvell.com> Tested-by: George G. Davis <gdavis@mvista.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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| .. | ||
| .gitignore | ||
| big-endian.S | ||
| head-at91rm9200.S | ||
| head-clps7500.S | ||
| head-l7200.S | ||
| head-sa1100.S | ||
| head-shark.S | ||
| head-sharpsl.S | ||
| head-xscale.S | ||
| head.S | ||
| ll_char_wr.S | ||
| Makefile | ||
| Makefile.debug | ||
| misc.c | ||
| ofw-shark.c | ||
| piggy.S | ||
| vmlinux.lds.in | ||