cc155c6f2c
For some platforms, it is inappropriate to register all PXA UARTs. In some cases, the UARTs may not be used, and in others we may want to avoid registering the UARTs to allow other drivers (eg, FICP) to make use of the UART. In addition, a while back there was a request to be able to pass platform data to the UART driver. This patch enables all of this by providing functions platforms can call to register each individual UART. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
1006 lines
20 KiB
C
1006 lines
20 KiB
C
#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <mach/udc.h>
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#include <mach/pxafb.h>
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#include <mach/mmc.h>
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#include <mach/irda.h>
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#include <mach/ohci.h>
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#include <mach/pxa27x_keypad.h>
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#include <mach/pxa2xx_spi.h>
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#include <mach/camera.h>
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#include <mach/audio.h>
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#include <plat/i2c.h>
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#include <plat/pxa3xx_nand.h>
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#include "devices.h"
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#include "generic.h"
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void __init pxa_register_device(struct platform_device *dev, void *data)
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{
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int ret;
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dev->dev.platform_data = data;
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ret = platform_device_register(dev);
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if (ret)
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dev_err(&dev->dev, "unable to register device: %d\n", ret);
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}
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static struct resource pxamci_resources[] = {
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[0] = {
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.start = 0x41100000,
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.end = 0x41100fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_MMC,
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.end = IRQ_MMC,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = 21,
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.end = 21,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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.start = 22,
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.end = 22,
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.flags = IORESOURCE_DMA,
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},
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};
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static u64 pxamci_dmamask = 0xffffffffUL;
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struct platform_device pxa_device_mci = {
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.name = "pxa2xx-mci",
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.id = 0,
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.dev = {
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.dma_mask = &pxamci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxamci_resources),
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.resource = pxamci_resources,
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};
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void __init pxa_set_mci_info(struct pxamci_platform_data *info)
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{
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pxa_register_device(&pxa_device_mci, info);
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}
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static struct pxa2xx_udc_mach_info pxa_udc_info = {
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.gpio_pullup = -1,
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.gpio_vbus = -1,
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};
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void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
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{
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memcpy(&pxa_udc_info, info, sizeof *info);
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}
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static struct resource pxa2xx_udc_resources[] = {
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[0] = {
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.start = 0x40600000,
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.end = 0x4060ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_USB,
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.end = IRQ_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dma_mask = ~(u32)0;
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struct platform_device pxa25x_device_udc = {
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.name = "pxa25x-udc",
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.id = -1,
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.resource = pxa2xx_udc_resources,
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.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
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.dev = {
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.platform_data = &pxa_udc_info,
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.dma_mask = &udc_dma_mask,
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}
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};
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struct platform_device pxa27x_device_udc = {
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.name = "pxa27x-udc",
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.id = -1,
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.resource = pxa2xx_udc_resources,
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.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
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.dev = {
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.platform_data = &pxa_udc_info,
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.dma_mask = &udc_dma_mask,
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}
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};
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static struct resource pxafb_resources[] = {
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[0] = {
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.start = 0x44000000,
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.end = 0x4400ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_LCD,
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.end = IRQ_LCD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 fb_dma_mask = ~(u64)0;
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struct platform_device pxa_device_fb = {
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.name = "pxa2xx-fb",
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.id = -1,
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.dev = {
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.dma_mask = &fb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxafb_resources),
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.resource = pxafb_resources,
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};
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void __init set_pxa_fb_info(struct pxafb_mach_info *info)
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{
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pxa_register_device(&pxa_device_fb, info);
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}
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void __init set_pxa_fb_parent(struct device *parent_dev)
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{
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pxa_device_fb.dev.parent = parent_dev;
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}
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static struct resource pxa_resource_ffuart[] = {
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{
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.start = 0x40100000,
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.end = 0x40100023,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_FFUART,
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.end = IRQ_FFUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_ffuart = {
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.name = "pxa2xx-uart",
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.id = 0,
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.resource = pxa_resource_ffuart,
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.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
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};
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void __init pxa_set_ffuart_info(void *info)
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{
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pxa_register_device(&pxa_device_ffuart, info);
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}
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static struct resource pxa_resource_btuart[] = {
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{
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.start = 0x40200000,
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.end = 0x40200023,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_BTUART,
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.end = IRQ_BTUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_btuart = {
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.name = "pxa2xx-uart",
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.id = 1,
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.resource = pxa_resource_btuart,
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.num_resources = ARRAY_SIZE(pxa_resource_btuart),
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};
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void __init pxa_set_btuart_info(void *info)
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{
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pxa_register_device(&pxa_device_btuart, info);
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}
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static struct resource pxa_resource_stuart[] = {
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{
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.start = 0x40700000,
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.end = 0x40700023,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_STUART,
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.end = IRQ_STUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_stuart = {
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.name = "pxa2xx-uart",
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.id = 2,
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.resource = pxa_resource_stuart,
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.num_resources = ARRAY_SIZE(pxa_resource_stuart),
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};
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void __init pxa_set_stuart_info(void *info)
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{
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pxa_register_device(&pxa_device_stuart, info);
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}
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static struct resource pxa_resource_hwuart[] = {
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{
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.start = 0x41600000,
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.end = 0x4160002F,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_HWUART,
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.end = IRQ_HWUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_hwuart = {
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.name = "pxa2xx-uart",
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.id = 3,
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.resource = pxa_resource_hwuart,
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.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
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};
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void __init pxa_set_hwuart_info(void *info)
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{
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if (cpu_is_pxa255())
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pxa_register_device(&pxa_device_hwuart, info);
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else
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pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
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}
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static struct resource pxai2c_resources[] = {
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{
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.start = 0x40301680,
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.end = 0x403016a3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_I2C,
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.end = IRQ_I2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa_device_i2c = {
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.name = "pxa2xx-i2c",
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.id = 0,
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.resource = pxai2c_resources,
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.num_resources = ARRAY_SIZE(pxai2c_resources),
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};
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void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
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{
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pxa_register_device(&pxa_device_i2c, info);
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}
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#ifdef CONFIG_PXA27x
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static struct resource pxa27x_resources_i2c_power[] = {
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{
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.start = 0x40f00180,
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.end = 0x40f001a3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PWRI2C,
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.end = IRQ_PWRI2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa27x_device_i2c_power = {
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.name = "pxa2xx-i2c",
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.id = 1,
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.resource = pxa27x_resources_i2c_power,
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.num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
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};
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#endif
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#ifdef CONFIG_PXA3xx
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static struct resource pxa3xx_resources_i2c_power[] = {
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{
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.start = 0x40f500c0,
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.end = 0x40f500d3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PWRI2C,
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.end = IRQ_PWRI2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa3xx_device_i2c_power = {
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.name = "pxa3xx-pwri2c",
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.id = 1,
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.resource = pxa3xx_resources_i2c_power,
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.num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
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};
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#endif
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static struct resource pxai2s_resources[] = {
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{
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.start = 0x40400000,
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.end = 0x40400083,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_I2S,
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.end = IRQ_I2S,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device pxa_device_i2s = {
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.name = "pxa2xx-i2s",
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.id = -1,
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.resource = pxai2s_resources,
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.num_resources = ARRAY_SIZE(pxai2s_resources),
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};
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static u64 pxaficp_dmamask = ~(u32)0;
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struct platform_device pxa_device_ficp = {
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.name = "pxa2xx-ir",
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.id = -1,
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.dev = {
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.dma_mask = &pxaficp_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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};
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void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
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{
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pxa_register_device(&pxa_device_ficp, info);
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}
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static struct resource pxa_rtc_resources[] = {
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[0] = {
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.start = 0x40900000,
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.end = 0x40900000 + 0x3b,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_RTC1Hz,
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.end = IRQ_RTC1Hz,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = IRQ_RTCAlrm,
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.end = IRQ_RTCAlrm,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device sa1100_device_rtc = {
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.name = "sa1100-rtc",
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.id = -1,
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};
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struct platform_device pxa_device_rtc = {
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.name = "pxa-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(pxa_rtc_resources),
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.resource = pxa_rtc_resources,
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};
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static struct resource pxa_ac97_resources[] = {
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[0] = {
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.start = 0x40500000,
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.end = 0x40500000 + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_AC97,
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.end = IRQ_AC97,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 pxa_ac97_dmamask = 0xffffffffUL;
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struct platform_device pxa_device_ac97 = {
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.name = "pxa2xx-ac97",
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.id = -1,
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.dev = {
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.dma_mask = &pxa_ac97_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxa_ac97_resources),
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.resource = pxa_ac97_resources,
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};
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void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
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{
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pxa_register_device(&pxa_device_ac97, ops);
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}
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#ifdef CONFIG_PXA25x
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static struct resource pxa25x_resource_pwm0[] = {
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[0] = {
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.start = 0x40b00000,
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.end = 0x40b0000f,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device pxa25x_device_pwm0 = {
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.name = "pxa25x-pwm",
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.id = 0,
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.resource = pxa25x_resource_pwm0,
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.num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
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};
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static struct resource pxa25x_resource_pwm1[] = {
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[0] = {
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.start = 0x40c00000,
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.end = 0x40c0000f,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device pxa25x_device_pwm1 = {
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.name = "pxa25x-pwm",
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.id = 1,
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.resource = pxa25x_resource_pwm1,
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.num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
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};
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static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
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static struct resource pxa25x_resource_ssp[] = {
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[0] = {
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.start = 0x41000000,
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.end = 0x4100001f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_SSP,
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.end = IRQ_SSP,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* DRCMR for RX */
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.start = 13,
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.end = 13,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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/* DRCMR for TX */
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.start = 14,
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.end = 14,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device pxa25x_device_ssp = {
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.name = "pxa25x-ssp",
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.id = 0,
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.dev = {
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.dma_mask = &pxa25x_ssp_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = pxa25x_resource_ssp,
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.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
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};
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static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
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static struct resource pxa25x_resource_nssp[] = {
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[0] = {
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.start = 0x41400000,
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.end = 0x4140002f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_NSSP,
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.end = IRQ_NSSP,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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/* DRCMR for RX */
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.start = 15,
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.end = 15,
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.flags = IORESOURCE_DMA,
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},
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[3] = {
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/* DRCMR for TX */
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.start = 16,
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.end = 16,
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.flags = IORESOURCE_DMA,
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},
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};
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struct platform_device pxa25x_device_nssp = {
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.name = "pxa25x-nssp",
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.id = 1,
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.dev = {
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.dma_mask = &pxa25x_nssp_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.resource = pxa25x_resource_nssp,
|
|
.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
|
|
};
|
|
|
|
static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
static struct resource pxa25x_resource_assp[] = {
|
|
[0] = {
|
|
.start = 0x41500000,
|
|
.end = 0x4150002f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_ASSP,
|
|
.end = IRQ_ASSP,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
/* DRCMR for RX */
|
|
.start = 23,
|
|
.end = 23,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
/* DRCMR for TX */
|
|
.start = 24,
|
|
.end = 24,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa25x_device_assp = {
|
|
/* ASSP is basically equivalent to NSSP */
|
|
.name = "pxa25x-nssp",
|
|
.id = 2,
|
|
.dev = {
|
|
.dma_mask = &pxa25x_assp_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.resource = pxa25x_resource_assp,
|
|
.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
|
|
};
|
|
#endif /* CONFIG_PXA25x */
|
|
|
|
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
|
|
|
|
static struct resource pxa27x_resource_keypad[] = {
|
|
[0] = {
|
|
.start = 0x41500000,
|
|
.end = 0x4150004c,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_KEYPAD,
|
|
.end = IRQ_KEYPAD,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_keypad = {
|
|
.name = "pxa27x-keypad",
|
|
.id = -1,
|
|
.resource = pxa27x_resource_keypad,
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
|
|
};
|
|
|
|
void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
|
|
{
|
|
pxa_register_device(&pxa27x_device_keypad, info);
|
|
}
|
|
|
|
static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
static struct resource pxa27x_resource_ohci[] = {
|
|
[0] = {
|
|
.start = 0x4C000000,
|
|
.end = 0x4C00ff6f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_USBH1,
|
|
.end = IRQ_USBH1,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_ohci = {
|
|
.name = "pxa27x-ohci",
|
|
.id = -1,
|
|
.dev = {
|
|
.dma_mask = &pxa27x_ohci_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
|
|
.resource = pxa27x_resource_ohci,
|
|
};
|
|
|
|
void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
|
|
{
|
|
pxa_register_device(&pxa27x_device_ohci, info);
|
|
}
|
|
|
|
static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
static struct resource pxa27x_resource_ssp1[] = {
|
|
[0] = {
|
|
.start = 0x41000000,
|
|
.end = 0x4100003f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_SSP,
|
|
.end = IRQ_SSP,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
/* DRCMR for RX */
|
|
.start = 13,
|
|
.end = 13,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
/* DRCMR for TX */
|
|
.start = 14,
|
|
.end = 14,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_ssp1 = {
|
|
.name = "pxa27x-ssp",
|
|
.id = 0,
|
|
.dev = {
|
|
.dma_mask = &pxa27x_ssp1_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.resource = pxa27x_resource_ssp1,
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
|
|
};
|
|
|
|
static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
static struct resource pxa27x_resource_ssp2[] = {
|
|
[0] = {
|
|
.start = 0x41700000,
|
|
.end = 0x4170003f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_SSP2,
|
|
.end = IRQ_SSP2,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
/* DRCMR for RX */
|
|
.start = 15,
|
|
.end = 15,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
/* DRCMR for TX */
|
|
.start = 16,
|
|
.end = 16,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_ssp2 = {
|
|
.name = "pxa27x-ssp",
|
|
.id = 1,
|
|
.dev = {
|
|
.dma_mask = &pxa27x_ssp2_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.resource = pxa27x_resource_ssp2,
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
|
|
};
|
|
|
|
static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
static struct resource pxa27x_resource_ssp3[] = {
|
|
[0] = {
|
|
.start = 0x41900000,
|
|
.end = 0x4190003f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_SSP3,
|
|
.end = IRQ_SSP3,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
/* DRCMR for RX */
|
|
.start = 66,
|
|
.end = 66,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
/* DRCMR for TX */
|
|
.start = 67,
|
|
.end = 67,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_ssp3 = {
|
|
.name = "pxa27x-ssp",
|
|
.id = 2,
|
|
.dev = {
|
|
.dma_mask = &pxa27x_ssp3_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.resource = pxa27x_resource_ssp3,
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
|
|
};
|
|
|
|
static struct resource pxa27x_resource_pwm0[] = {
|
|
[0] = {
|
|
.start = 0x40b00000,
|
|
.end = 0x40b0001f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_pwm0 = {
|
|
.name = "pxa27x-pwm",
|
|
.id = 0,
|
|
.resource = pxa27x_resource_pwm0,
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
|
|
};
|
|
|
|
static struct resource pxa27x_resource_pwm1[] = {
|
|
[0] = {
|
|
.start = 0x40c00000,
|
|
.end = 0x40c0001f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa27x_device_pwm1 = {
|
|
.name = "pxa27x-pwm",
|
|
.id = 1,
|
|
.resource = pxa27x_resource_pwm1,
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
|
|
};
|
|
|
|
static struct resource pxa27x_resource_camera[] = {
|
|
[0] = {
|
|
.start = 0x50000000,
|
|
.end = 0x50000fff,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_CAMERA,
|
|
.end = IRQ_CAMERA,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
|
|
|
|
static struct platform_device pxa27x_device_camera = {
|
|
.name = "pxa27x-camera",
|
|
.id = 0, /* This is used to put cameras on this interface */
|
|
.dev = {
|
|
.dma_mask = &pxa27x_dma_mask_camera,
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
.num_resources = ARRAY_SIZE(pxa27x_resource_camera),
|
|
.resource = pxa27x_resource_camera,
|
|
};
|
|
|
|
void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
|
|
{
|
|
pxa_register_device(&pxa27x_device_camera, info);
|
|
}
|
|
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
|
|
|
|
#ifdef CONFIG_PXA3xx
|
|
static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
static struct resource pxa3xx_resource_ssp4[] = {
|
|
[0] = {
|
|
.start = 0x41a00000,
|
|
.end = 0x41a0003f,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_SSP4,
|
|
.end = IRQ_SSP4,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
/* DRCMR for RX */
|
|
.start = 2,
|
|
.end = 2,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
/* DRCMR for TX */
|
|
.start = 3,
|
|
.end = 3,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa3xx_device_ssp4 = {
|
|
/* PXA3xx SSP is basically equivalent to PXA27x */
|
|
.name = "pxa27x-ssp",
|
|
.id = 3,
|
|
.dev = {
|
|
.dma_mask = &pxa3xx_ssp4_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.resource = pxa3xx_resource_ssp4,
|
|
.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
|
|
};
|
|
|
|
static struct resource pxa3xx_resources_mci2[] = {
|
|
[0] = {
|
|
.start = 0x42000000,
|
|
.end = 0x42000fff,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_MMC2,
|
|
.end = IRQ_MMC2,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
.start = 93,
|
|
.end = 93,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
.start = 94,
|
|
.end = 94,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa3xx_device_mci2 = {
|
|
.name = "pxa2xx-mci",
|
|
.id = 1,
|
|
.dev = {
|
|
.dma_mask = &pxamci_dmamask,
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
.num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
|
|
.resource = pxa3xx_resources_mci2,
|
|
};
|
|
|
|
void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
|
|
{
|
|
pxa_register_device(&pxa3xx_device_mci2, info);
|
|
}
|
|
|
|
static struct resource pxa3xx_resources_mci3[] = {
|
|
[0] = {
|
|
.start = 0x42500000,
|
|
.end = 0x42500fff,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_MMC3,
|
|
.end = IRQ_MMC3,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
.start = 100,
|
|
.end = 100,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
.start = 101,
|
|
.end = 101,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
struct platform_device pxa3xx_device_mci3 = {
|
|
.name = "pxa2xx-mci",
|
|
.id = 2,
|
|
.dev = {
|
|
.dma_mask = &pxamci_dmamask,
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
.num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
|
|
.resource = pxa3xx_resources_mci3,
|
|
};
|
|
|
|
void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
|
|
{
|
|
pxa_register_device(&pxa3xx_device_mci3, info);
|
|
}
|
|
|
|
static struct resource pxa3xx_resources_nand[] = {
|
|
[0] = {
|
|
.start = 0x43100000,
|
|
.end = 0x43100053,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
[1] = {
|
|
.start = IRQ_NAND,
|
|
.end = IRQ_NAND,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
[2] = {
|
|
/* DRCMR for Data DMA */
|
|
.start = 97,
|
|
.end = 97,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
[3] = {
|
|
/* DRCMR for Command DMA */
|
|
.start = 99,
|
|
.end = 99,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
};
|
|
|
|
static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
|
|
|
|
struct platform_device pxa3xx_device_nand = {
|
|
.name = "pxa3xx-nand",
|
|
.id = -1,
|
|
.dev = {
|
|
.dma_mask = &pxa3xx_nand_dma_mask,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
},
|
|
.num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
|
|
.resource = pxa3xx_resources_nand,
|
|
};
|
|
|
|
void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
|
|
{
|
|
pxa_register_device(&pxa3xx_device_nand, info);
|
|
}
|
|
|
|
static struct resource pxa3xx_resources_gcu[] = {
|
|
{
|
|
.start = 0x54000000,
|
|
.end = 0x54000fff,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = IRQ_GCU,
|
|
.end = IRQ_GCU,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
|
|
|
|
struct platform_device pxa3xx_device_gcu = {
|
|
.name = "pxa3xx-gcu",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
|
|
.resource = pxa3xx_resources_gcu,
|
|
.dev = {
|
|
.dma_mask = &pxa3xx_gcu_dmamask,
|
|
.coherent_dma_mask = 0xffffffff,
|
|
},
|
|
};
|
|
|
|
#endif /* CONFIG_PXA3xx */
|
|
|
|
/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
|
|
* See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
|
|
void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
|
|
{
|
|
struct platform_device *pd;
|
|
|
|
pd = platform_device_alloc("pxa2xx-spi", id);
|
|
if (pd == NULL) {
|
|
printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
|
|
id);
|
|
return;
|
|
}
|
|
|
|
pd->dev.platform_data = info;
|
|
platform_device_add(pd);
|
|
}
|