f8ce25476d
This is needs to be visible to other architectures using the AMBA bus and peripherals. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
127 lines
3.0 KiB
C
127 lines
3.0 KiB
C
/*
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* linux/arch/arm/plat-omap/cpu-omap.c
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*
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* CPU frequency scaling for OMAP
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*
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* Copyright (C) 2005 Nokia Corporation
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* Written by Tony Lindgren <tony@atomide.com>
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*
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* Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/system.h>
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/* TODO: Add support for SDRAM timing changes */
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int omap_verify_speed(struct cpufreq_policy *policy)
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{
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struct clk * mpu_clk;
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if (policy->cpu)
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return -EINVAL;
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cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
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policy->cpuinfo.max_freq);
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mpu_clk = clk_get(NULL, "mpu");
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if (IS_ERR(mpu_clk))
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return PTR_ERR(mpu_clk);
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policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
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policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
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cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
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policy->cpuinfo.max_freq);
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clk_put(mpu_clk);
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return 0;
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}
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unsigned int omap_getspeed(unsigned int cpu)
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{
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struct clk * mpu_clk;
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unsigned long rate;
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if (cpu)
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return 0;
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mpu_clk = clk_get(NULL, "mpu");
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if (IS_ERR(mpu_clk))
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return 0;
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rate = clk_get_rate(mpu_clk) / 1000;
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clk_put(mpu_clk);
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return rate;
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}
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static int omap_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct clk * mpu_clk;
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struct cpufreq_freqs freqs;
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int ret = 0;
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mpu_clk = clk_get(NULL, "mpu");
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if (IS_ERR(mpu_clk))
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return PTR_ERR(mpu_clk);
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freqs.old = omap_getspeed(0);
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freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
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freqs.cpu = 0;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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ret = clk_set_rate(mpu_clk, target_freq * 1000);
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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clk_put(mpu_clk);
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return ret;
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}
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static int __init omap_cpu_init(struct cpufreq_policy *policy)
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{
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struct clk * mpu_clk;
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mpu_clk = clk_get(NULL, "mpu");
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if (IS_ERR(mpu_clk))
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return PTR_ERR(mpu_clk);
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if (policy->cpu != 0)
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return -EINVAL;
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policy->cur = policy->min = policy->max = omap_getspeed(0);
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
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policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000;
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policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
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clk_put(mpu_clk);
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return 0;
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}
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static struct cpufreq_driver omap_driver = {
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.flags = CPUFREQ_STICKY,
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.verify = omap_verify_speed,
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.target = omap_target,
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.get = omap_getspeed,
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.init = omap_cpu_init,
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.name = "omap",
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};
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static int __init omap_cpufreq_init(void)
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{
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return cpufreq_register_driver(&omap_driver);
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}
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arch_initcall(omap_cpufreq_init);
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