1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
101 lines
2.1 KiB
C
101 lines
2.1 KiB
C
#ifndef __ASM_MACH_APIC_H
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#define __ASM_MACH_APIC_H
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#include <mach_apicdef.h>
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#include <asm/smp.h>
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#define APIC_DFR_VALUE (APIC_DFR_FLAT)
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#define no_balance_irq (0)
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#define esr_disable (0)
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#define NO_IOAPIC_CHECK (0)
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#define INT_DELIVERY_MODE dest_LowestPrio
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#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
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#ifdef CONFIG_SMP
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#define TARGET_CPUS cpu_online_map
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#else
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#define TARGET_CPUS cpumask_of_cpu(0)
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#endif
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#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
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#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
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static inline int apic_id_registered(void)
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{
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return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
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}
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/*
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* Set up the logical destination ID.
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*
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* Intel recommends to set DFR, LDR and TPR before enabling
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* an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
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* document number 292116). So here it goes...
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*/
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static inline void init_apic_ldr(void)
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{
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unsigned long val;
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apic_write_around(APIC_DFR, APIC_DFR_VALUE);
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val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
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val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
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apic_write_around(APIC_LDR, val);
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}
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static inline void summit_check(char *oem, char *productid)
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{
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}
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static inline void clustered_apic_check(void)
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{
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}
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/* Mapping from cpu number to logical apicid */
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static inline int cpu_to_logical_apicid(int cpu)
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{
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return 1 << cpu;
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}
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static inline int cpu_present_to_apicid(int mps_cpu)
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{
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if (mps_cpu < get_physical_broadcast())
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return mps_cpu;
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else
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return BAD_APICID;
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}
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static inline physid_mask_t apicid_to_cpu_present(int apicid)
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{
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return physid_mask_of_physid(apicid);
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}
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#define WAKE_SECONDARY_VIA_INIT
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static inline void setup_portio_remap(void)
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{
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}
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static inline void enable_apic_mode(void)
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{
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}
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static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
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{
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return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
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}
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static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
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{
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return cpus_addr(cpumask)[0];
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}
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static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
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{
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return cpuid_apic >> index_msb;
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}
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#endif /* __ASM_MACH_APIC_H */
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