0e73a47f09
Improved values for some registers after Xorg Trident driver. The main
problem was that values set by BIOS have been ignored.
This patch completely remove random pixels ("snow") on the TGUI 9680 and
9440 (not supported yet by the driver). It does not help with the "snow"
on 3DImage and Blade3D cards.
There is also small improvement in timing calculations (hblank start and
vblank start)
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
126 lines
2.8 KiB
C
126 lines
2.8 KiB
C
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#ifndef TRIDENTFB_DEBUG
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#define TRIDENTFB_DEBUG 0
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#endif
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#if TRIDENTFB_DEBUG
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#define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a);mdelay(1000);
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#else
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#define debug(f,a...)
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#endif
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#define output(f, a...) pr_info("tridentfb: " f, ## a)
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#define Kb (1024)
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#define Mb (Kb*Kb)
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/* PCI IDS of supported cards temporarily here */
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#define CYBER9320 0x9320
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#define CYBER9388 0x9388
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#define CYBER9382 0x9382 /* the real PCI id for this is 9660 */
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#define CYBER9385 0x9385 /* ditto */
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#define CYBER9397 0x9397
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#define CYBER9397DVD 0x939A
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#define CYBER9520 0x9520
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#define CYBER9525DVD 0x9525
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#define TGUI9660 0x9660
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#define PROVIDIA9685 0x9685
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#define IMAGE975 0x9750
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#define IMAGE985 0x9850
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#define BLADE3D 0x9880
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#define CYBERBLADEE4 0x9540
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#define CYBERBLADEi7 0x8400
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#define CYBERBLADEi7D 0x8420
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#define CYBERBLADEi1 0x8500
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#define CYBERBLADEi1D 0x8520
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#define CYBERBLADEAi1 0x8600
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#define CYBERBLADEAi1D 0x8620
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#define CYBERBLADEXPAi1 0x8820
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#define CYBERBLADEXPm8 0x9910
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#define CYBERBLADEXPm16 0x9930
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/* these defines are for 'lcd' variable */
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#define LCD_STRETCH 0
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#define LCD_CENTER 1
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#define LCD_BIOS 2
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/* General Registers */
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#define SPR 0x1F /* Software Programming Register (videoram) */
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/* 3C4 */
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#define RevisionID 0x09
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#define OldOrNew 0x0B
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#define ConfPort1 0x0C
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#define ConfPort2 0x0C
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#define NewMode2 0x0D
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#define NewMode1 0x0E
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#define Protection 0x11
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#define MCLKLow 0x16
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#define MCLKHigh 0x17
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#define ClockLow 0x18
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#define ClockHigh 0x19
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#define SSetup 0x20
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#define SKey 0x37
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#define SPKey 0x57
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/* 3x4 */
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#define CRTCModuleTest 0x1E
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#define FIFOControl 0x20
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#define LinearAddReg 0x21
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#define DRAMTiming 0x23
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#define New32 0x23
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#define RAMDACTiming 0x25
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#define CRTHiOrd 0x27
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#define AddColReg 0x29
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#define InterfaceSel 0x2A
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#define HorizOverflow 0x2B
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#define GETest 0x2D
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#define Performance 0x2F
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#define GraphEngReg 0x36
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#define I2C 0x37
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#define PixelBusReg 0x38
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#define PCIReg 0x39
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#define DRAMControl 0x3A
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#define MiscContReg 0x3C
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#define CursorXLow 0x40
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#define CursorXHigh 0x41
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#define CursorYLow 0x42
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#define CursorYHigh 0x43
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#define CursorLocLow 0x44
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#define CursorLocHigh 0x45
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#define CursorXOffset 0x46
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#define CursorYOffset 0x47
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#define CursorFG1 0x48
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#define CursorFG2 0x49
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#define CursorFG3 0x4A
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#define CursorFG4 0x4B
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#define CursorBG1 0x4C
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#define CursorBG2 0x4D
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#define CursorBG3 0x4E
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#define CursorBG4 0x4F
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#define CursorControl 0x50
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#define PCIRetry 0x55
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#define PreEndControl 0x56
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#define PreEndFetch 0x57
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#define PCIMaster 0x60
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#define Enhancement0 0x62
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#define NewEDO 0x64
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#define TVinterface 0xC0
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#define TVMode 0xC1
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#define ClockControl 0xCF
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/* 3CE */
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#define MiscExtFunc 0x0F
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#define PowerStatus 0x23
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#define MiscIntContReg 0x2F
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#define CyberControl 0x30
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#define CyberEnhance 0x31
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#define FPConfig 0x33
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#define VertStretch 0x52
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#define HorStretch 0x53
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#define BiosMode 0x5c
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#define BiosReg 0x5d
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