bb8985586b
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
39 lines
840 B
C
39 lines
840 B
C
/*
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* NSC/Cyrix CPU indexed register access. Must be inlined instead of
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* macros to ensure correct access ordering
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* Access order is always 0x22 (=offset), 0x23 (=value)
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*
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* When using the old macros a line like
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* setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
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* gets expanded to:
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* do {
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* outb((CX86_CCR2), 0x22);
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* outb((({
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* outb((CX86_CCR2), 0x22);
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* inb(0x23);
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* }) | 0x88), 0x23);
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* } while (0);
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*
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* which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
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*/
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static inline u8 getCx86(u8 reg)
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{
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outb(reg, 0x22);
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return inb(0x23);
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}
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static inline void setCx86(u8 reg, u8 data)
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{
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outb(reg, 0x22);
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outb(data, 0x23);
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}
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#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
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#define setCx86_old(reg, data) do { \
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outb((reg), 0x22); \
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outb((data), 0x23); \
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} while (0)
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