ec98c6b9b4
As per Documentation/feature-removal-schedule.txt Signed-off-by: David S. Miller <davem@davemloft.net>
93 lines
3.4 KiB
C
93 lines
3.4 KiB
C
/* $Id: head.h,v 1.39 2000/05/26 22:18:45 ecd Exp $ */
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#ifndef __SPARC_HEAD_H
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#define __SPARC_HEAD_H
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#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */
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#define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */
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#define SUN4C_SEGSZ (1 << 18)
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#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */
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#define INTS_ENAB 0x01 /* entry.S uses this. */
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#define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */
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#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
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#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */
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/* Here are some trap goodies */
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/* Generic trap entry. */
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#define TRAP_ENTRY(type, label) \
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rd %psr, %l0; b label; rd %wim, %l3; nop;
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/* Data/text faults. Defaults to sun4c version at boot time. */
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#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
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#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
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#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
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#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
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/* This is for traps we should NEVER get. */
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#define BAD_TRAP(num) \
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rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
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/* This is for traps when we want just skip the instruction which caused it */
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#define SKIP_TRAP(type, name) \
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jmpl %l2, %g0; rett %l2 + 4; nop; nop;
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/* Notice that for the system calls we pull a trick. We load up a
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* different pointer to the system call vector table in %l7, but call
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* the same generic system call low-level entry point. The trap table
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* entry sequences are also HyperSparc pipeline friendly ;-)
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*/
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/* Software trap for Linux system calls. */
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#define LINUX_SYSCALL_TRAP \
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sethi %hi(sys_call_table), %l7; \
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or %l7, %lo(sys_call_table), %l7; \
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b linux_sparc_syscall; \
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rd %psr, %l0;
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#define BREAKPOINT_TRAP \
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b breakpoint_trap; \
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rd %psr,%l0; \
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nop; \
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nop;
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/* The Get Condition Codes software trap for userland. */
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#define GETCC_TRAP \
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b getcc_trap_handler; mov %psr, %l0; nop; nop;
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/* The Set Condition Codes software trap for userland. */
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#define SETCC_TRAP \
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b setcc_trap_handler; mov %psr, %l0; nop; nop;
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/* The Get PSR software trap for userland. */
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#define GETPSR_TRAP \
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mov %psr, %i0; jmp %l2; rett %l2 + 4; nop;
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/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
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* gets handled with another macro.
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*/
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#define TRAP_ENTRY_INTERRUPT(int_level) \
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mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
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/* NMI's (Non Maskable Interrupts) are special, you can't keep them
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* from coming in, and basically if you get one, the shows over. ;(
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* On the sun4c they are usually asynchronous memory errors, on the
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* the sun4m they could be either due to mem errors or a software
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* initiated interrupt from the prom/kern on an SMP box saying "I
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* command you to do CPU tricks, read your mailbox for more info."
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*/
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#define NMI_TRAP \
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rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
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/* Window overflows/underflows are special and we need to try to be as
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* efficient as possible here....
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*/
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#define WINDOW_SPILL \
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rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0;
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#define WINDOW_FILL \
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rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0;
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#endif /* __SPARC_HEAD_H */
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