4c2241fd42
Implement arch specific irqsafe_cpu ops. The arch specific ops do not disable/enable interrupts since that is an expensive operation. Instead we disable preemption and perform a compare and swap loop. Since on server distros (the ones we care about) preemption is disabled the preempt_disable()/preempt_enable() pair is a nop. In the end this code should be faster than the generic one. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
90 lines
3.1 KiB
C
90 lines
3.1 KiB
C
#ifndef __ARCH_S390_PERCPU__
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#define __ARCH_S390_PERCPU__
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#include <linux/preempt.h>
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#include <asm/cmpxchg.h>
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/*
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* s390 uses its own implementation for per cpu data, the offset of
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* the cpu local data area is cached in the cpu's lowcore memory.
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*/
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#define __my_cpu_offset S390_lowcore.percpu_offset
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/*
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* For 64 bit module code, the module may be more than 4G above the
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* per cpu area, use weak definitions to force the compiler to
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* generate external references.
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*/
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#if defined(CONFIG_SMP) && defined(__s390x__) && defined(MODULE)
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#define ARCH_NEEDS_WEAK_PER_CPU
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#endif
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#define arch_irqsafe_cpu_to_op(pcp, val, op) \
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do { \
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typedef typeof(pcp) pcp_op_T__; \
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pcp_op_T__ old__, new__, prev__; \
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pcp_op_T__ *ptr__; \
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preempt_disable(); \
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ptr__ = __this_cpu_ptr(&(pcp)); \
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prev__ = *ptr__; \
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do { \
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old__ = prev__; \
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new__ = old__ op (val); \
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switch (sizeof(*ptr__)) { \
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case 8: \
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prev__ = cmpxchg64(ptr__, old__, new__); \
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break; \
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default: \
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prev__ = cmpxchg(ptr__, old__, new__); \
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} \
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} while (prev__ != old__); \
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preempt_enable(); \
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} while (0)
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#define irqsafe_cpu_add_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +)
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#define irqsafe_cpu_add_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +)
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#define irqsafe_cpu_add_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +)
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#define irqsafe_cpu_add_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, +)
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#define irqsafe_cpu_and_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &)
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#define irqsafe_cpu_and_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &)
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#define irqsafe_cpu_and_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &)
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#define irqsafe_cpu_and_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, &)
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#define irqsafe_cpu_or_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |)
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#define irqsafe_cpu_or_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |)
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#define irqsafe_cpu_or_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |)
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#define irqsafe_cpu_or_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, |)
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#define irqsafe_cpu_xor_1(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^)
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#define irqsafe_cpu_xor_2(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^)
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#define irqsafe_cpu_xor_4(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^)
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#define irqsafe_cpu_xor_8(pcp, val) arch_irqsafe_cpu_to_op(pcp, val, ^)
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#define arch_irqsafe_cpu_cmpxchg(pcp, oval, nval) \
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({ \
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typedef typeof(pcp) pcp_op_T__; \
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pcp_op_T__ ret__; \
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pcp_op_T__ *ptr__; \
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preempt_disable(); \
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ptr__ = __this_cpu_ptr(&(pcp)); \
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switch (sizeof(*ptr__)) { \
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case 8: \
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ret__ = cmpxchg64(ptr__, oval, nval); \
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break; \
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default: \
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ret__ = cmpxchg(ptr__, oval, nval); \
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} \
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preempt_enable(); \
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ret__; \
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})
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#define irqsafe_cpu_cmpxchg_1(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval)
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#define irqsafe_cpu_cmpxchg_2(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval)
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#define irqsafe_cpu_cmpxchg_4(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval)
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#define irqsafe_cpu_cmpxchg_8(pcp, oval, nval) arch_irqsafe_cpu_cmpxchg(pcp, oval, nval)
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#include <asm-generic/percpu.h>
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#endif /* __ARCH_S390_PERCPU__ */
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