5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2375 lines
67 KiB
C
2375 lines
67 KiB
C
/*
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*******************************************************************************
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** O.S : Linux
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** FILE NAME : arcmsr_hba.c
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** BY : Erich Chen
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** Description: SCSI RAID Device Driver for
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** ARECA RAID Host adapter
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*******************************************************************************
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** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
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**
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** Web site: www.areca.com.tw
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** E-mail: support@areca.com.tw
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**
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** This program is free software; you can redistribute it and/or modify
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** it under the terms of the GNU General Public License version 2 as
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** published by the Free Software Foundation.
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** This program is distributed in the hope that it will be useful,
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** but WITHOUT ANY WARRANTY; without even the implied warranty of
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** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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** GNU General Public License for more details.
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*******************************************************************************
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** Redistribution and use in source and binary forms, with or without
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** modification, are permitted provided that the following conditions
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** are met:
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** 1. Redistributions of source code must retain the above copyright
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** notice, this list of conditions and the following disclaimer.
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** 2. Redistributions in binary form must reproduce the above copyright
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** notice, this list of conditions and the following disclaimer in the
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** documentation and/or other materials provided with the distribution.
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** 3. The name of the author may not be used to endorse or promote products
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** derived from this software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
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** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
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** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
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** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
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** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
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*******************************************************************************
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*/
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#include <linux/module.h>
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#include <linux/reboot.h>
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#include <linux/spinlock.h>
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#include <linux/pci_ids.h>
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#include <linux/interrupt.h>
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#include <linux/moduleparam.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/timer.h>
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#include <linux/pci.h>
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#include <linux/aer.h>
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#include <linux/slab.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_tcq.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_transport.h>
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#include <scsi/scsicam.h>
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#include "arcmsr.h"
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MODULE_AUTHOR("Erich Chen <support@areca.com.tw>");
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MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter");
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_VERSION(ARCMSR_DRIVER_VERSION);
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static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
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struct scsi_cmnd *cmd);
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static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
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static int arcmsr_abort(struct scsi_cmnd *);
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static int arcmsr_bus_reset(struct scsi_cmnd *);
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static int arcmsr_bios_param(struct scsi_device *sdev,
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struct block_device *bdev, sector_t capacity, int *info);
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static int arcmsr_queue_command(struct scsi_cmnd *cmd,
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void (*done) (struct scsi_cmnd *));
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static int arcmsr_probe(struct pci_dev *pdev,
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const struct pci_device_id *id);
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static void arcmsr_remove(struct pci_dev *pdev);
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static void arcmsr_shutdown(struct pci_dev *pdev);
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static void arcmsr_iop_init(struct AdapterControlBlock *acb);
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static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
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static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
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static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
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static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
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static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
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static const char *arcmsr_info(struct Scsi_Host *);
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static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
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static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
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int queue_depth, int reason)
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{
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if (reason != SCSI_QDEPTH_DEFAULT)
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return -EOPNOTSUPP;
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if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
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queue_depth = ARCMSR_MAX_CMD_PERLUN;
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scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
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return queue_depth;
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}
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static struct scsi_host_template arcmsr_scsi_host_template = {
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.module = THIS_MODULE,
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.name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter"
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ARCMSR_DRIVER_VERSION,
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.info = arcmsr_info,
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.queuecommand = arcmsr_queue_command,
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.eh_abort_handler = arcmsr_abort,
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.eh_bus_reset_handler = arcmsr_bus_reset,
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.bios_param = arcmsr_bios_param,
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.change_queue_depth = arcmsr_adjust_disk_queue_depth,
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.can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
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.this_id = ARCMSR_SCSI_INITIATOR_ID,
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.sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
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.max_sectors = ARCMSR_MAX_XFER_SECTORS,
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.cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
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.use_clustering = ENABLE_CLUSTERING,
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.shost_attrs = arcmsr_host_attrs,
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};
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#ifdef CONFIG_SCSI_ARCMSR_AER
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static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev);
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static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
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pci_channel_state_t state);
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static struct pci_error_handlers arcmsr_pci_error_handlers = {
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.error_detected = arcmsr_pci_error_detected,
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.slot_reset = arcmsr_pci_slot_reset,
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};
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#endif
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static struct pci_device_id arcmsr_device_id_table[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
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{0, 0}, /* Terminating entry */
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};
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MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
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static struct pci_driver arcmsr_pci_driver = {
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.name = "arcmsr",
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.id_table = arcmsr_device_id_table,
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.probe = arcmsr_probe,
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.remove = arcmsr_remove,
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.shutdown = arcmsr_shutdown,
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#ifdef CONFIG_SCSI_ARCMSR_AER
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.err_handler = &arcmsr_pci_error_handlers,
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#endif
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};
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static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
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{
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irqreturn_t handle_state;
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struct AdapterControlBlock *acb = dev_id;
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spin_lock(acb->host->host_lock);
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handle_state = arcmsr_interrupt(acb);
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spin_unlock(acb->host->host_lock);
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return handle_state;
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}
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static int arcmsr_bios_param(struct scsi_device *sdev,
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struct block_device *bdev, sector_t capacity, int *geom)
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{
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int ret, heads, sectors, cylinders, total_capacity;
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unsigned char *buffer;/* return copy of block device's partition table */
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buffer = scsi_bios_ptable(bdev);
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if (buffer) {
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ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
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kfree(buffer);
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if (ret != -1)
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return ret;
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}
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total_capacity = capacity;
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heads = 64;
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sectors = 32;
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cylinders = total_capacity / (heads * sectors);
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if (cylinders > 1024) {
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heads = 255;
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sectors = 63;
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cylinders = total_capacity / (heads * sectors);
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}
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geom[0] = heads;
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geom[1] = sectors;
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geom[2] = cylinders;
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return 0;
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}
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static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
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{
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struct pci_dev *pdev = acb->pdev;
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u16 dev_id;
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pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
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switch (dev_id) {
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case 0x1201 : {
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acb->adapter_type = ACB_ADAPTER_TYPE_B;
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}
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break;
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default : acb->adapter_type = ACB_ADAPTER_TYPE_A;
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}
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}
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static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
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{
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switch (acb->adapter_type) {
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case ACB_ADAPTER_TYPE_A: {
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struct pci_dev *pdev = acb->pdev;
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void *dma_coherent;
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dma_addr_t dma_coherent_handle, dma_addr;
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struct CommandControlBlock *ccb_tmp;
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uint32_t intmask_org;
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int i, j;
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acb->pmuA = pci_ioremap_bar(pdev, 0);
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if (!acb->pmuA) {
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printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n",
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acb->host->host_no);
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return -ENOMEM;
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}
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dma_coherent = dma_alloc_coherent(&pdev->dev,
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ARCMSR_MAX_FREECCB_NUM *
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sizeof (struct CommandControlBlock) + 0x20,
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&dma_coherent_handle, GFP_KERNEL);
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if (!dma_coherent) {
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iounmap(acb->pmuA);
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return -ENOMEM;
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}
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acb->dma_coherent = dma_coherent;
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acb->dma_coherent_handle = dma_coherent_handle;
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if (((unsigned long)dma_coherent & 0x1F)) {
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dma_coherent = dma_coherent +
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(0x20 - ((unsigned long)dma_coherent & 0x1F));
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dma_coherent_handle = dma_coherent_handle +
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(0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
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}
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dma_addr = dma_coherent_handle;
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ccb_tmp = (struct CommandControlBlock *)dma_coherent;
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for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
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ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
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ccb_tmp->acb = acb;
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acb->pccb_pool[i] = ccb_tmp;
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list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
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dma_addr = dma_addr + sizeof(struct CommandControlBlock);
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ccb_tmp++;
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}
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acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
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for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
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for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
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acb->devstate[i][j] = ARECA_RAID_GONE;
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/*
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** here we need to tell iop 331 our ccb_tmp.HighPart
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** if ccb_tmp.HighPart is not zero
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*/
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intmask_org = arcmsr_disable_outbound_ints(acb);
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}
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break;
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case ACB_ADAPTER_TYPE_B: {
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struct pci_dev *pdev = acb->pdev;
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struct MessageUnit_B *reg;
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void __iomem *mem_base0, *mem_base1;
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void *dma_coherent;
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dma_addr_t dma_coherent_handle, dma_addr;
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uint32_t intmask_org;
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struct CommandControlBlock *ccb_tmp;
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int i, j;
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dma_coherent = dma_alloc_coherent(&pdev->dev,
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((ARCMSR_MAX_FREECCB_NUM *
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sizeof(struct CommandControlBlock) + 0x20) +
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sizeof(struct MessageUnit_B)),
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&dma_coherent_handle, GFP_KERNEL);
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if (!dma_coherent)
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return -ENOMEM;
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acb->dma_coherent = dma_coherent;
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acb->dma_coherent_handle = dma_coherent_handle;
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if (((unsigned long)dma_coherent & 0x1F)) {
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dma_coherent = dma_coherent +
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(0x20 - ((unsigned long)dma_coherent & 0x1F));
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dma_coherent_handle = dma_coherent_handle +
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(0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
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}
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dma_addr = dma_coherent_handle;
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ccb_tmp = (struct CommandControlBlock *)dma_coherent;
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for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
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ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
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ccb_tmp->acb = acb;
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acb->pccb_pool[i] = ccb_tmp;
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list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
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dma_addr = dma_addr + sizeof(struct CommandControlBlock);
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ccb_tmp++;
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}
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reg = (struct MessageUnit_B *)(dma_coherent +
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ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
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acb->pmuB = reg;
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mem_base0 = pci_ioremap_bar(pdev, 0);
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if (!mem_base0)
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goto out;
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|
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mem_base1 = pci_ioremap_bar(pdev, 2);
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if (!mem_base1) {
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iounmap(mem_base0);
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goto out;
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}
|
|
|
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reg->drv2iop_doorbell_reg = mem_base0 + ARCMSR_DRV2IOP_DOORBELL;
|
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reg->drv2iop_doorbell_mask_reg = mem_base0 +
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ARCMSR_DRV2IOP_DOORBELL_MASK;
|
|
reg->iop2drv_doorbell_reg = mem_base0 + ARCMSR_IOP2DRV_DOORBELL;
|
|
reg->iop2drv_doorbell_mask_reg = mem_base0 +
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ARCMSR_IOP2DRV_DOORBELL_MASK;
|
|
reg->ioctl_wbuffer_reg = mem_base1 + ARCMSR_IOCTL_WBUFFER;
|
|
reg->ioctl_rbuffer_reg = mem_base1 + ARCMSR_IOCTL_RBUFFER;
|
|
reg->msgcode_rwbuffer_reg = mem_base1 + ARCMSR_MSGCODE_RWBUFFER;
|
|
|
|
acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
|
|
for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
|
|
for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
|
|
acb->devstate[i][j] = ARECA_RAID_GOOD;
|
|
|
|
/*
|
|
** here we need to tell iop 331 our ccb_tmp.HighPart
|
|
** if ccb_tmp.HighPart is not zero
|
|
*/
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
}
|
|
break;
|
|
}
|
|
return 0;
|
|
|
|
out:
|
|
dma_free_coherent(&acb->pdev->dev,
|
|
(ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 +
|
|
sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static int arcmsr_probe(struct pci_dev *pdev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
struct Scsi_Host *host;
|
|
struct AdapterControlBlock *acb;
|
|
uint8_t bus, dev_fun;
|
|
int error;
|
|
|
|
error = pci_enable_device(pdev);
|
|
if (error)
|
|
goto out;
|
|
pci_set_master(pdev);
|
|
|
|
host = scsi_host_alloc(&arcmsr_scsi_host_template,
|
|
sizeof(struct AdapterControlBlock));
|
|
if (!host) {
|
|
error = -ENOMEM;
|
|
goto out_disable_device;
|
|
}
|
|
acb = (struct AdapterControlBlock *)host->hostdata;
|
|
memset(acb, 0, sizeof (struct AdapterControlBlock));
|
|
|
|
error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
if (error) {
|
|
error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
|
if (error) {
|
|
printk(KERN_WARNING
|
|
"scsi%d: No suitable DMA mask available\n",
|
|
host->host_no);
|
|
goto out_host_put;
|
|
}
|
|
}
|
|
bus = pdev->bus->number;
|
|
dev_fun = pdev->devfn;
|
|
acb->host = host;
|
|
acb->pdev = pdev;
|
|
host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
|
|
host->max_lun = ARCMSR_MAX_TARGETLUN;
|
|
host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
|
|
host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
|
|
host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
|
|
host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
|
|
host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
|
|
host->this_id = ARCMSR_SCSI_INITIATOR_ID;
|
|
host->unique_id = (bus << 8) | dev_fun;
|
|
host->irq = pdev->irq;
|
|
error = pci_request_regions(pdev, "arcmsr");
|
|
if (error) {
|
|
goto out_host_put;
|
|
}
|
|
arcmsr_define_adapter_type(acb);
|
|
|
|
acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
ACB_F_MESSAGE_RQBUFFER_CLEARED |
|
|
ACB_F_MESSAGE_WQBUFFER_READED);
|
|
acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
|
|
INIT_LIST_HEAD(&acb->ccb_free_list);
|
|
|
|
error = arcmsr_alloc_ccb_pool(acb);
|
|
if (error)
|
|
goto out_release_regions;
|
|
|
|
error = request_irq(pdev->irq, arcmsr_do_interrupt,
|
|
IRQF_SHARED, "arcmsr", acb);
|
|
if (error)
|
|
goto out_free_ccb_pool;
|
|
|
|
arcmsr_iop_init(acb);
|
|
pci_set_drvdata(pdev, host);
|
|
if (strncmp(acb->firm_version, "V1.42", 5) >= 0)
|
|
host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B;
|
|
|
|
error = scsi_add_host(host, &pdev->dev);
|
|
if (error)
|
|
goto out_free_irq;
|
|
|
|
error = arcmsr_alloc_sysfs_attr(acb);
|
|
if (error)
|
|
goto out_free_sysfs;
|
|
|
|
scsi_scan_host(host);
|
|
#ifdef CONFIG_SCSI_ARCMSR_AER
|
|
pci_enable_pcie_error_reporting(pdev);
|
|
#endif
|
|
return 0;
|
|
out_free_sysfs:
|
|
out_free_irq:
|
|
free_irq(pdev->irq, acb);
|
|
out_free_ccb_pool:
|
|
arcmsr_free_ccb_pool(acb);
|
|
out_release_regions:
|
|
pci_release_regions(pdev);
|
|
out_host_put:
|
|
scsi_host_put(host);
|
|
out_disable_device:
|
|
pci_disable_device(pdev);
|
|
out:
|
|
return error;
|
|
}
|
|
|
|
static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
uint32_t Index;
|
|
uint8_t Retries = 0x00;
|
|
|
|
do {
|
|
for (Index = 0; Index < 100; Index++) {
|
|
if (readl(®->outbound_intstatus) &
|
|
ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
|
|
writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
|
|
®->outbound_intstatus);
|
|
return 0x00;
|
|
}
|
|
msleep(10);
|
|
}/*max 1 seconds*/
|
|
|
|
} while (Retries++ < 20);/*max 20 sec*/
|
|
return 0xff;
|
|
}
|
|
|
|
static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
uint32_t Index;
|
|
uint8_t Retries = 0x00;
|
|
|
|
do {
|
|
for (Index = 0; Index < 100; Index++) {
|
|
if (readl(reg->iop2drv_doorbell_reg)
|
|
& ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
|
|
writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
|
|
, reg->iop2drv_doorbell_reg);
|
|
writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
|
|
return 0x00;
|
|
}
|
|
msleep(10);
|
|
}/*max 1 seconds*/
|
|
|
|
} while (Retries++ < 20);/*max 20 sec*/
|
|
return 0xff;
|
|
}
|
|
|
|
static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
|
|
if (arcmsr_hba_wait_msgint_ready(acb))
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: wait 'abort all outstanding command' timeout \n"
|
|
, acb->host->host_no);
|
|
}
|
|
|
|
static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
|
writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg);
|
|
if (arcmsr_hbb_wait_msgint_ready(acb))
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: wait 'abort all outstanding command' timeout \n"
|
|
, acb->host->host_no);
|
|
}
|
|
|
|
static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
arcmsr_abort_hba_allcmd(acb);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
arcmsr_abort_hbb_allcmd(acb);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
|
|
{
|
|
struct scsi_cmnd *pcmd = ccb->pcmd;
|
|
|
|
scsi_dma_unmap(pcmd);
|
|
}
|
|
|
|
static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
|
|
{
|
|
struct AdapterControlBlock *acb = ccb->acb;
|
|
struct scsi_cmnd *pcmd = ccb->pcmd;
|
|
|
|
arcmsr_pci_unmap_dma(ccb);
|
|
if (stand_flag == 1)
|
|
atomic_dec(&acb->ccboutstandingcount);
|
|
ccb->startdone = ARCMSR_CCB_DONE;
|
|
ccb->ccb_flags = 0;
|
|
list_add_tail(&ccb->list, &acb->ccb_free_list);
|
|
pcmd->scsi_done(pcmd);
|
|
}
|
|
|
|
static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
int retry_count = 30;
|
|
|
|
writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
|
|
do {
|
|
if (!arcmsr_hba_wait_msgint_ready(acb))
|
|
break;
|
|
else {
|
|
retry_count--;
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
|
|
timeout, retry count down = %d \n", acb->host->host_no, retry_count);
|
|
}
|
|
} while (retry_count != 0);
|
|
}
|
|
|
|
static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
int retry_count = 30;
|
|
|
|
writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg);
|
|
do {
|
|
if (!arcmsr_hbb_wait_msgint_ready(acb))
|
|
break;
|
|
else {
|
|
retry_count--;
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
|
|
timeout,retry count down = %d \n", acb->host->host_no, retry_count);
|
|
}
|
|
} while (retry_count != 0);
|
|
}
|
|
|
|
static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
arcmsr_flush_hba_cache(acb);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
arcmsr_flush_hbb_cache(acb);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
|
|
{
|
|
|
|
struct scsi_cmnd *pcmd = ccb->pcmd;
|
|
struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
|
|
|
|
pcmd->result = DID_OK << 16;
|
|
if (sensebuffer) {
|
|
int sense_data_length =
|
|
sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
|
|
? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
|
|
memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
|
|
memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
|
|
sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
|
|
sensebuffer->Valid = 1;
|
|
}
|
|
}
|
|
|
|
static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
|
|
{
|
|
u32 orig_mask = 0;
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A : {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
orig_mask = readl(®->outbound_intmask)|\
|
|
ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
|
|
writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
|
|
®->outbound_intmask);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B : {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \
|
|
(~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
|
|
writel(0, reg->iop2drv_doorbell_mask_reg);
|
|
}
|
|
break;
|
|
}
|
|
return orig_mask;
|
|
}
|
|
|
|
static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
|
|
struct CommandControlBlock *ccb, uint32_t flag_ccb)
|
|
{
|
|
|
|
uint8_t id, lun;
|
|
id = ccb->pcmd->device->id;
|
|
lun = ccb->pcmd->device->lun;
|
|
if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
|
|
if (acb->devstate[id][lun] == ARECA_RAID_GONE)
|
|
acb->devstate[id][lun] = ARECA_RAID_GOOD;
|
|
ccb->pcmd->result = DID_OK << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
} else {
|
|
switch (ccb->arcmsr_cdb.DeviceStatus) {
|
|
case ARCMSR_DEV_SELECT_TIMEOUT: {
|
|
acb->devstate[id][lun] = ARECA_RAID_GONE;
|
|
ccb->pcmd->result = DID_NO_CONNECT << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_DEV_ABORTED:
|
|
|
|
case ARCMSR_DEV_INIT_FAIL: {
|
|
acb->devstate[id][lun] = ARECA_RAID_GONE;
|
|
ccb->pcmd->result = DID_BAD_TARGET << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_DEV_CHECK_CONDITION: {
|
|
acb->devstate[id][lun] = ARECA_RAID_GOOD;
|
|
arcmsr_report_sense_info(ccb);
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: scsi id = %d lun = %d"
|
|
" isr get command error done, "
|
|
"but got unknown DeviceStatus = 0x%x \n"
|
|
, acb->host->host_no
|
|
, id
|
|
, lun
|
|
, ccb->arcmsr_cdb.DeviceStatus);
|
|
acb->devstate[id][lun] = ARECA_RAID_GONE;
|
|
ccb->pcmd->result = DID_NO_CONNECT << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb)
|
|
|
|
{
|
|
struct CommandControlBlock *ccb;
|
|
|
|
ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
|
|
if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
|
|
if (ccb->startdone == ARCMSR_CCB_ABORTED) {
|
|
struct scsi_cmnd *abortcmd = ccb->pcmd;
|
|
if (abortcmd) {
|
|
abortcmd->result |= DID_ABORT << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \
|
|
isr got aborted command \n", acb->host->host_no, ccb);
|
|
}
|
|
}
|
|
printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
|
|
done acb = '0x%p'"
|
|
"ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
|
|
" ccboutstandingcount = %d \n"
|
|
, acb->host->host_no
|
|
, acb
|
|
, ccb
|
|
, ccb->acb
|
|
, ccb->startdone
|
|
, atomic_read(&acb->ccboutstandingcount));
|
|
}
|
|
else
|
|
arcmsr_report_ccb_state(acb, ccb, flag_ccb);
|
|
}
|
|
|
|
static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
|
|
{
|
|
int i = 0;
|
|
uint32_t flag_ccb;
|
|
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
uint32_t outbound_intstatus;
|
|
outbound_intstatus = readl(®->outbound_intstatus) &
|
|
acb->outbound_int_enable;
|
|
/*clear and abort all outbound posted Q*/
|
|
writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/
|
|
while (((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF)
|
|
&& (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
|
|
arcmsr_drain_donequeue(acb, flag_ccb);
|
|
}
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
/*clear all outbound posted Q*/
|
|
for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
|
|
if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) {
|
|
writel(0, ®->done_qbuffer[i]);
|
|
arcmsr_drain_donequeue(acb, flag_ccb);
|
|
}
|
|
writel(0, ®->post_qbuffer[i]);
|
|
}
|
|
reg->doneq_index = 0;
|
|
reg->postq_index = 0;
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
static void arcmsr_remove(struct pci_dev *pdev)
|
|
{
|
|
struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
struct AdapterControlBlock *acb =
|
|
(struct AdapterControlBlock *) host->hostdata;
|
|
int poll_count = 0;
|
|
|
|
arcmsr_free_sysfs_attr(acb);
|
|
scsi_remove_host(host);
|
|
arcmsr_stop_adapter_bgrb(acb);
|
|
arcmsr_flush_adapter_cache(acb);
|
|
arcmsr_disable_outbound_ints(acb);
|
|
acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
|
|
acb->acb_flags &= ~ACB_F_IOP_INITED;
|
|
|
|
for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) {
|
|
if (!atomic_read(&acb->ccboutstandingcount))
|
|
break;
|
|
arcmsr_interrupt(acb);/* FIXME: need spinlock */
|
|
msleep(25);
|
|
}
|
|
|
|
if (atomic_read(&acb->ccboutstandingcount)) {
|
|
int i;
|
|
|
|
arcmsr_abort_allcmd(acb);
|
|
arcmsr_done4abort_postqueue(acb);
|
|
for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
|
|
struct CommandControlBlock *ccb = acb->pccb_pool[i];
|
|
if (ccb->startdone == ARCMSR_CCB_START) {
|
|
ccb->startdone = ARCMSR_CCB_ABORTED;
|
|
ccb->pcmd->result = DID_ABORT << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
}
|
|
}
|
|
}
|
|
|
|
free_irq(pdev->irq, acb);
|
|
arcmsr_free_ccb_pool(acb);
|
|
pci_release_regions(pdev);
|
|
|
|
scsi_host_put(host);
|
|
|
|
pci_disable_device(pdev);
|
|
pci_set_drvdata(pdev, NULL);
|
|
}
|
|
|
|
static void arcmsr_shutdown(struct pci_dev *pdev)
|
|
{
|
|
struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
struct AdapterControlBlock *acb =
|
|
(struct AdapterControlBlock *)host->hostdata;
|
|
|
|
arcmsr_stop_adapter_bgrb(acb);
|
|
arcmsr_flush_adapter_cache(acb);
|
|
}
|
|
|
|
static int arcmsr_module_init(void)
|
|
{
|
|
int error = 0;
|
|
|
|
error = pci_register_driver(&arcmsr_pci_driver);
|
|
return error;
|
|
}
|
|
|
|
static void arcmsr_module_exit(void)
|
|
{
|
|
pci_unregister_driver(&arcmsr_pci_driver);
|
|
}
|
|
module_init(arcmsr_module_init);
|
|
module_exit(arcmsr_module_exit);
|
|
|
|
static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \
|
|
u32 intmask_org)
|
|
{
|
|
u32 mask;
|
|
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A : {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
|
|
ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
|
|
writel(mask, ®->outbound_intmask);
|
|
acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B : {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \
|
|
ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE);
|
|
writel(mask, reg->iop2drv_doorbell_mask_reg);
|
|
acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
|
|
struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
|
|
{
|
|
struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
|
|
int8_t *psge = (int8_t *)&arcmsr_cdb->u;
|
|
__le32 address_lo, address_hi;
|
|
int arccdbsize = 0x30;
|
|
int nseg;
|
|
|
|
ccb->pcmd = pcmd;
|
|
memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
|
|
arcmsr_cdb->Bus = 0;
|
|
arcmsr_cdb->TargetID = pcmd->device->id;
|
|
arcmsr_cdb->LUN = pcmd->device->lun;
|
|
arcmsr_cdb->Function = 1;
|
|
arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
|
|
arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
|
|
memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
|
|
|
|
nseg = scsi_dma_map(pcmd);
|
|
if (nseg > ARCMSR_MAX_SG_ENTRIES)
|
|
return FAILED;
|
|
BUG_ON(nseg < 0);
|
|
|
|
if (nseg) {
|
|
__le32 length;
|
|
int i, cdb_sgcount = 0;
|
|
struct scatterlist *sg;
|
|
|
|
/* map stor port SG list to our iop SG List. */
|
|
scsi_for_each_sg(pcmd, sg, nseg, i) {
|
|
/* Get the physical address of the current data pointer */
|
|
length = cpu_to_le32(sg_dma_len(sg));
|
|
address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
|
|
address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
|
|
if (address_hi == 0) {
|
|
struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
|
|
|
|
pdma_sg->address = address_lo;
|
|
pdma_sg->length = length;
|
|
psge += sizeof (struct SG32ENTRY);
|
|
arccdbsize += sizeof (struct SG32ENTRY);
|
|
} else {
|
|
struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
|
|
|
|
pdma_sg->addresshigh = address_hi;
|
|
pdma_sg->address = address_lo;
|
|
pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
|
|
psge += sizeof (struct SG64ENTRY);
|
|
arccdbsize += sizeof (struct SG64ENTRY);
|
|
}
|
|
cdb_sgcount++;
|
|
}
|
|
arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
|
|
arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
|
|
if ( arccdbsize > 256)
|
|
arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
|
|
}
|
|
if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
|
|
arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
|
|
ccb->ccb_flags |= CCB_FLAG_WRITE;
|
|
}
|
|
return SUCCESS;
|
|
}
|
|
|
|
static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
|
|
{
|
|
uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
|
|
struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
|
|
atomic_inc(&acb->ccboutstandingcount);
|
|
ccb->startdone = ARCMSR_CCB_START;
|
|
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
|
|
writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
|
|
®->inbound_queueport);
|
|
else {
|
|
writel(cdb_shifted_phyaddr, ®->inbound_queueport);
|
|
}
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
uint32_t ending_index, index = reg->postq_index;
|
|
|
|
ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
|
|
writel(0, ®->post_qbuffer[ending_index]);
|
|
if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
|
|
writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
|
|
®->post_qbuffer[index]);
|
|
}
|
|
else {
|
|
writel(cdb_shifted_phyaddr, ®->post_qbuffer[index]);
|
|
}
|
|
index++;
|
|
index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
|
|
reg->postq_index = index;
|
|
writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
|
|
|
|
if (arcmsr_hba_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
|
|
, acb->host->host_no);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg);
|
|
|
|
if (arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
|
|
, acb->host->host_no);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
arcmsr_stop_hba_bgrb(acb);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
arcmsr_stop_hbb_bgrb(acb);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
iounmap(acb->pmuA);
|
|
dma_free_coherent(&acb->pdev->dev,
|
|
ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
|
|
acb->dma_coherent,
|
|
acb->dma_coherent_handle);
|
|
break;
|
|
}
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
iounmap(reg->drv2iop_doorbell_reg - ARCMSR_DRV2IOP_DOORBELL);
|
|
iounmap(reg->ioctl_wbuffer_reg - ARCMSR_IOCTL_WBUFFER);
|
|
dma_free_coherent(&acb->pdev->dev,
|
|
(ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 +
|
|
sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle);
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
/*
|
|
** push inbound doorbell tell iop, driver data write ok
|
|
** and wait reply on next hwinterrupt for next Qbuffer post
|
|
*/
|
|
writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
/*
|
|
** push inbound doorbell tell iop, driver data write ok
|
|
** and wait reply on next hwinterrupt for next Qbuffer post
|
|
*/
|
|
writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
|
|
{
|
|
struct QBUFFER __iomem *qbuffer = NULL;
|
|
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer;
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
qbuffer = (struct QBUFFER __iomem *)reg->ioctl_rbuffer_reg;
|
|
}
|
|
break;
|
|
}
|
|
return qbuffer;
|
|
}
|
|
|
|
static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
|
|
{
|
|
struct QBUFFER __iomem *pqbuffer = NULL;
|
|
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer;
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg;
|
|
}
|
|
break;
|
|
}
|
|
return pqbuffer;
|
|
}
|
|
|
|
static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
|
|
{
|
|
struct QBUFFER __iomem *prbuffer;
|
|
struct QBUFFER *pQbuffer;
|
|
uint8_t __iomem *iop_data;
|
|
int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
|
|
|
|
rqbuf_lastindex = acb->rqbuf_lastindex;
|
|
rqbuf_firstindex = acb->rqbuf_firstindex;
|
|
prbuffer = arcmsr_get_iop_rqbuffer(acb);
|
|
iop_data = (uint8_t __iomem *)prbuffer->data;
|
|
iop_len = prbuffer->data_len;
|
|
my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1);
|
|
|
|
if (my_empty_len >= iop_len)
|
|
{
|
|
while (iop_len > 0) {
|
|
pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
|
|
memcpy(pQbuffer, iop_data,1);
|
|
rqbuf_lastindex++;
|
|
rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
|
iop_data++;
|
|
iop_len--;
|
|
}
|
|
acb->rqbuf_lastindex = rqbuf_lastindex;
|
|
arcmsr_iop_message_read(acb);
|
|
}
|
|
|
|
else {
|
|
acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
|
|
{
|
|
acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
|
|
if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
|
|
uint8_t *pQbuffer;
|
|
struct QBUFFER __iomem *pwbuffer;
|
|
uint8_t __iomem *iop_data;
|
|
int32_t allxfer_len = 0;
|
|
|
|
acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
|
|
pwbuffer = arcmsr_get_iop_wqbuffer(acb);
|
|
iop_data = (uint8_t __iomem *)pwbuffer->data;
|
|
|
|
while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
|
|
(allxfer_len < 124)) {
|
|
pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
|
|
memcpy(iop_data, pQbuffer, 1);
|
|
acb->wqbuf_firstindex++;
|
|
acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
|
iop_data++;
|
|
allxfer_len++;
|
|
}
|
|
pwbuffer->data_len = allxfer_len;
|
|
|
|
arcmsr_iop_message_wrote(acb);
|
|
}
|
|
|
|
if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
|
|
acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t outbound_doorbell;
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
outbound_doorbell = readl(®->outbound_doorbell);
|
|
writel(outbound_doorbell, ®->outbound_doorbell);
|
|
if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
|
|
arcmsr_iop2drv_data_wrote_handle(acb);
|
|
}
|
|
|
|
if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
|
|
arcmsr_iop2drv_data_read_handle(acb);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t flag_ccb;
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) {
|
|
arcmsr_drain_donequeue(acb, flag_ccb);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t index;
|
|
uint32_t flag_ccb;
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
|
index = reg->doneq_index;
|
|
|
|
while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) {
|
|
writel(0, ®->done_qbuffer[index]);
|
|
arcmsr_drain_donequeue(acb, flag_ccb);
|
|
index++;
|
|
index %= ARCMSR_MAX_HBB_POSTQUEUE;
|
|
reg->doneq_index = index;
|
|
}
|
|
}
|
|
|
|
static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t outbound_intstatus;
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
outbound_intstatus = readl(®->outbound_intstatus) & \
|
|
acb->outbound_int_enable;
|
|
if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
|
|
return 1;
|
|
}
|
|
writel(outbound_intstatus, ®->outbound_intstatus);
|
|
if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
|
|
arcmsr_hba_doorbell_isr(acb);
|
|
}
|
|
if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
|
|
arcmsr_hba_postqueue_isr(acb);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t outbound_doorbell;
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
|
outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \
|
|
acb->outbound_int_enable;
|
|
if (!outbound_doorbell)
|
|
return 1;
|
|
|
|
writel(~outbound_doorbell, reg->iop2drv_doorbell_reg);
|
|
/*in case the last action of doorbell interrupt clearance is cached, this action can push HW to write down the clear bit*/
|
|
readl(reg->iop2drv_doorbell_reg);
|
|
writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
|
|
if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
|
|
arcmsr_iop2drv_data_wrote_handle(acb);
|
|
}
|
|
if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
|
|
arcmsr_iop2drv_data_read_handle(acb);
|
|
}
|
|
if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
|
|
arcmsr_hbb_postqueue_isr(acb);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
if (arcmsr_handle_hba_isr(acb)) {
|
|
return IRQ_NONE;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
if (arcmsr_handle_hbb_isr(acb)) {
|
|
return IRQ_NONE;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
|
|
{
|
|
if (acb) {
|
|
/* stop adapter background rebuild */
|
|
if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
|
|
uint32_t intmask_org;
|
|
acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
arcmsr_stop_adapter_bgrb(acb);
|
|
arcmsr_flush_adapter_cache(acb);
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
}
|
|
}
|
|
}
|
|
|
|
void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
|
|
{
|
|
int32_t wqbuf_firstindex, wqbuf_lastindex;
|
|
uint8_t *pQbuffer;
|
|
struct QBUFFER __iomem *pwbuffer;
|
|
uint8_t __iomem *iop_data;
|
|
int32_t allxfer_len = 0;
|
|
|
|
pwbuffer = arcmsr_get_iop_wqbuffer(acb);
|
|
iop_data = (uint8_t __iomem *)pwbuffer->data;
|
|
if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
|
|
acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
|
|
wqbuf_firstindex = acb->wqbuf_firstindex;
|
|
wqbuf_lastindex = acb->wqbuf_lastindex;
|
|
while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
|
|
pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
|
|
memcpy(iop_data, pQbuffer, 1);
|
|
wqbuf_firstindex++;
|
|
wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
|
iop_data++;
|
|
allxfer_len++;
|
|
}
|
|
acb->wqbuf_firstindex = wqbuf_firstindex;
|
|
pwbuffer->data_len = allxfer_len;
|
|
arcmsr_iop_message_wrote(acb);
|
|
}
|
|
}
|
|
|
|
static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \
|
|
struct scsi_cmnd *cmd)
|
|
{
|
|
struct CMD_MESSAGE_FIELD *pcmdmessagefld;
|
|
int retvalue = 0, transfer_len = 0;
|
|
char *buffer;
|
|
struct scatterlist *sg;
|
|
uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
|
|
(uint32_t ) cmd->cmnd[6] << 16 |
|
|
(uint32_t ) cmd->cmnd[7] << 8 |
|
|
(uint32_t ) cmd->cmnd[8];
|
|
/* 4 bytes: Areca io control code */
|
|
|
|
sg = scsi_sglist(cmd);
|
|
buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
|
|
if (scsi_sg_count(cmd) > 1) {
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
goto message_out;
|
|
}
|
|
transfer_len += sg->length;
|
|
|
|
if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
goto message_out;
|
|
}
|
|
pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
|
|
switch(controlcode) {
|
|
|
|
case ARCMSR_MESSAGE_READ_RQBUFFER: {
|
|
unsigned char *ver_addr;
|
|
uint8_t *pQbuffer, *ptmpQbuffer;
|
|
int32_t allxfer_len = 0;
|
|
|
|
ver_addr = kmalloc(1032, GFP_ATOMIC);
|
|
if (!ver_addr) {
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
goto message_out;
|
|
}
|
|
ptmpQbuffer = ver_addr;
|
|
while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
|
|
&& (allxfer_len < 1031)) {
|
|
pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
|
|
memcpy(ptmpQbuffer, pQbuffer, 1);
|
|
acb->rqbuf_firstindex++;
|
|
acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
|
ptmpQbuffer++;
|
|
allxfer_len++;
|
|
}
|
|
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
|
struct QBUFFER __iomem *prbuffer;
|
|
uint8_t __iomem *iop_data;
|
|
int32_t iop_len;
|
|
|
|
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
prbuffer = arcmsr_get_iop_rqbuffer(acb);
|
|
iop_data = prbuffer->data;
|
|
iop_len = readl(&prbuffer->data_len);
|
|
while (iop_len > 0) {
|
|
acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
|
|
acb->rqbuf_lastindex++;
|
|
acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
|
iop_data++;
|
|
iop_len--;
|
|
}
|
|
arcmsr_iop_message_read(acb);
|
|
}
|
|
memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
|
|
pcmdmessagefld->cmdmessage.Length = allxfer_len;
|
|
pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
kfree(ver_addr);
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
|
|
unsigned char *ver_addr;
|
|
int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
|
|
uint8_t *pQbuffer, *ptmpuserbuffer;
|
|
|
|
ver_addr = kmalloc(1032, GFP_ATOMIC);
|
|
if (!ver_addr) {
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
goto message_out;
|
|
}
|
|
ptmpuserbuffer = ver_addr;
|
|
user_len = pcmdmessagefld->cmdmessage.Length;
|
|
memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
|
|
wqbuf_lastindex = acb->wqbuf_lastindex;
|
|
wqbuf_firstindex = acb->wqbuf_firstindex;
|
|
if (wqbuf_lastindex != wqbuf_firstindex) {
|
|
struct SENSE_DATA *sensebuffer =
|
|
(struct SENSE_DATA *)cmd->sense_buffer;
|
|
arcmsr_post_ioctldata2iop(acb);
|
|
/* has error report sensedata */
|
|
sensebuffer->ErrorCode = 0x70;
|
|
sensebuffer->SenseKey = ILLEGAL_REQUEST;
|
|
sensebuffer->AdditionalSenseLength = 0x0A;
|
|
sensebuffer->AdditionalSenseCode = 0x20;
|
|
sensebuffer->Valid = 1;
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
} else {
|
|
my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
|
|
&(ARCMSR_MAX_QBUFFER - 1);
|
|
if (my_empty_len >= user_len) {
|
|
while (user_len > 0) {
|
|
pQbuffer =
|
|
&acb->wqbuffer[acb->wqbuf_lastindex];
|
|
memcpy(pQbuffer, ptmpuserbuffer, 1);
|
|
acb->wqbuf_lastindex++;
|
|
acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
|
ptmpuserbuffer++;
|
|
user_len--;
|
|
}
|
|
if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
|
|
acb->acb_flags &=
|
|
~ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
|
arcmsr_post_ioctldata2iop(acb);
|
|
}
|
|
} else {
|
|
/* has error report sensedata */
|
|
struct SENSE_DATA *sensebuffer =
|
|
(struct SENSE_DATA *)cmd->sense_buffer;
|
|
sensebuffer->ErrorCode = 0x70;
|
|
sensebuffer->SenseKey = ILLEGAL_REQUEST;
|
|
sensebuffer->AdditionalSenseLength = 0x0A;
|
|
sensebuffer->AdditionalSenseCode = 0x20;
|
|
sensebuffer->Valid = 1;
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
}
|
|
}
|
|
kfree(ver_addr);
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
|
|
uint8_t *pQbuffer = acb->rqbuffer;
|
|
|
|
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
arcmsr_iop_message_read(acb);
|
|
}
|
|
acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
|
|
acb->rqbuf_firstindex = 0;
|
|
acb->rqbuf_lastindex = 0;
|
|
memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
|
|
pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
|
|
uint8_t *pQbuffer = acb->wqbuffer;
|
|
|
|
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
arcmsr_iop_message_read(acb);
|
|
}
|
|
acb->acb_flags |=
|
|
(ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
ACB_F_MESSAGE_WQBUFFER_READED);
|
|
acb->wqbuf_firstindex = 0;
|
|
acb->wqbuf_lastindex = 0;
|
|
memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
|
|
uint8_t *pQbuffer;
|
|
|
|
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
arcmsr_iop_message_read(acb);
|
|
}
|
|
acb->acb_flags |=
|
|
(ACB_F_MESSAGE_WQBUFFER_CLEARED
|
|
| ACB_F_MESSAGE_RQBUFFER_CLEARED
|
|
| ACB_F_MESSAGE_WQBUFFER_READED);
|
|
acb->rqbuf_firstindex = 0;
|
|
acb->rqbuf_lastindex = 0;
|
|
acb->wqbuf_firstindex = 0;
|
|
acb->wqbuf_lastindex = 0;
|
|
pQbuffer = acb->rqbuffer;
|
|
memset(pQbuffer, 0, sizeof(struct QBUFFER));
|
|
pQbuffer = acb->wqbuffer;
|
|
memset(pQbuffer, 0, sizeof(struct QBUFFER));
|
|
pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_RETURN_CODE_3F: {
|
|
pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_SAY_HELLO: {
|
|
int8_t *hello_string = "Hello! I am ARCMSR";
|
|
|
|
memcpy(pcmdmessagefld->messagedatabuffer, hello_string
|
|
, (int16_t)strlen(hello_string));
|
|
pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
}
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_SAY_GOODBYE:
|
|
arcmsr_iop_parking(acb);
|
|
break;
|
|
|
|
case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
|
|
arcmsr_flush_adapter_cache(acb);
|
|
break;
|
|
|
|
default:
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
}
|
|
message_out:
|
|
sg = scsi_sglist(cmd);
|
|
kunmap_atomic(buffer - sg->offset, KM_IRQ0);
|
|
return retvalue;
|
|
}
|
|
|
|
static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
|
|
{
|
|
struct list_head *head = &acb->ccb_free_list;
|
|
struct CommandControlBlock *ccb = NULL;
|
|
|
|
if (!list_empty(head)) {
|
|
ccb = list_entry(head->next, struct CommandControlBlock, list);
|
|
list_del(head->next);
|
|
}
|
|
return ccb;
|
|
}
|
|
|
|
static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
|
|
struct scsi_cmnd *cmd)
|
|
{
|
|
switch (cmd->cmnd[0]) {
|
|
case INQUIRY: {
|
|
unsigned char inqdata[36];
|
|
char *buffer;
|
|
struct scatterlist *sg;
|
|
|
|
if (cmd->device->lun) {
|
|
cmd->result = (DID_TIME_OUT << 16);
|
|
cmd->scsi_done(cmd);
|
|
return;
|
|
}
|
|
inqdata[0] = TYPE_PROCESSOR;
|
|
/* Periph Qualifier & Periph Dev Type */
|
|
inqdata[1] = 0;
|
|
/* rem media bit & Dev Type Modifier */
|
|
inqdata[2] = 0;
|
|
/* ISO, ECMA, & ANSI versions */
|
|
inqdata[4] = 31;
|
|
/* length of additional data */
|
|
strncpy(&inqdata[8], "Areca ", 8);
|
|
/* Vendor Identification */
|
|
strncpy(&inqdata[16], "RAID controller ", 16);
|
|
/* Product Identification */
|
|
strncpy(&inqdata[32], "R001", 4); /* Product Revision */
|
|
|
|
sg = scsi_sglist(cmd);
|
|
buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
|
|
|
|
memcpy(buffer, inqdata, sizeof(inqdata));
|
|
sg = scsi_sglist(cmd);
|
|
kunmap_atomic(buffer - sg->offset, KM_IRQ0);
|
|
|
|
cmd->scsi_done(cmd);
|
|
}
|
|
break;
|
|
case WRITE_BUFFER:
|
|
case READ_BUFFER: {
|
|
if (arcmsr_iop_message_xfer(acb, cmd))
|
|
cmd->result = (DID_ERROR << 16);
|
|
cmd->scsi_done(cmd);
|
|
}
|
|
break;
|
|
default:
|
|
cmd->scsi_done(cmd);
|
|
}
|
|
}
|
|
|
|
static int arcmsr_queue_command(struct scsi_cmnd *cmd,
|
|
void (* done)(struct scsi_cmnd *))
|
|
{
|
|
struct Scsi_Host *host = cmd->device->host;
|
|
struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
|
|
struct CommandControlBlock *ccb;
|
|
int target = cmd->device->id;
|
|
int lun = cmd->device->lun;
|
|
|
|
cmd->scsi_done = done;
|
|
cmd->host_scribble = NULL;
|
|
cmd->result = 0;
|
|
if (acb->acb_flags & ACB_F_BUS_RESET) {
|
|
printk(KERN_NOTICE "arcmsr%d: bus reset"
|
|
" and return busy \n"
|
|
, acb->host->host_no);
|
|
return SCSI_MLQUEUE_HOST_BUSY;
|
|
}
|
|
if (target == 16) {
|
|
/* virtual device for iop message transfer */
|
|
arcmsr_handle_virtual_command(acb, cmd);
|
|
return 0;
|
|
}
|
|
if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
|
|
uint8_t block_cmd;
|
|
|
|
block_cmd = cmd->cmnd[0] & 0x0f;
|
|
if (block_cmd == 0x08 || block_cmd == 0x0a) {
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: block 'read/write'"
|
|
"command with gone raid volume"
|
|
" Cmd = %2x, TargetId = %d, Lun = %d \n"
|
|
, acb->host->host_no
|
|
, cmd->cmnd[0]
|
|
, target, lun);
|
|
cmd->result = (DID_NO_CONNECT << 16);
|
|
cmd->scsi_done(cmd);
|
|
return 0;
|
|
}
|
|
}
|
|
if (atomic_read(&acb->ccboutstandingcount) >=
|
|
ARCMSR_MAX_OUTSTANDING_CMD)
|
|
return SCSI_MLQUEUE_HOST_BUSY;
|
|
|
|
ccb = arcmsr_get_freeccb(acb);
|
|
if (!ccb)
|
|
return SCSI_MLQUEUE_HOST_BUSY;
|
|
if ( arcmsr_build_ccb( acb, ccb, cmd ) == FAILED ) {
|
|
cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
|
|
cmd->scsi_done(cmd);
|
|
return 0;
|
|
}
|
|
arcmsr_post_ccb(acb, ccb);
|
|
return 0;
|
|
}
|
|
|
|
static void arcmsr_get_hba_config(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
char *acb_firm_model = acb->firm_model;
|
|
char *acb_firm_version = acb->firm_version;
|
|
char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]);
|
|
char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]);
|
|
int count;
|
|
|
|
writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
|
|
if (arcmsr_hba_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
|
|
miscellaneous data' timeout \n", acb->host->host_no);
|
|
}
|
|
|
|
count = 8;
|
|
while (count) {
|
|
*acb_firm_model = readb(iop_firm_model);
|
|
acb_firm_model++;
|
|
iop_firm_model++;
|
|
count--;
|
|
}
|
|
|
|
count = 16;
|
|
while (count) {
|
|
*acb_firm_version = readb(iop_firm_version);
|
|
acb_firm_version++;
|
|
iop_firm_version++;
|
|
count--;
|
|
}
|
|
|
|
printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
|
|
, acb->host->host_no
|
|
, acb->firm_version);
|
|
|
|
acb->firm_request_len = readl(®->message_rwbuffer[1]);
|
|
acb->firm_numbers_queue = readl(®->message_rwbuffer[2]);
|
|
acb->firm_sdram_size = readl(®->message_rwbuffer[3]);
|
|
acb->firm_hd_channels = readl(®->message_rwbuffer[4]);
|
|
}
|
|
|
|
static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
uint32_t __iomem *lrwbuffer = reg->msgcode_rwbuffer_reg;
|
|
char *acb_firm_model = acb->firm_model;
|
|
char *acb_firm_version = acb->firm_version;
|
|
char __iomem *iop_firm_model = (char __iomem *)(&lrwbuffer[15]);
|
|
/*firm_model,15,60-67*/
|
|
char __iomem *iop_firm_version = (char __iomem *)(&lrwbuffer[17]);
|
|
/*firm_version,17,68-83*/
|
|
int count;
|
|
|
|
writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg);
|
|
if (arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
|
|
miscellaneous data' timeout \n", acb->host->host_no);
|
|
}
|
|
|
|
count = 8;
|
|
while (count)
|
|
{
|
|
*acb_firm_model = readb(iop_firm_model);
|
|
acb_firm_model++;
|
|
iop_firm_model++;
|
|
count--;
|
|
}
|
|
|
|
count = 16;
|
|
while (count)
|
|
{
|
|
*acb_firm_version = readb(iop_firm_version);
|
|
acb_firm_version++;
|
|
iop_firm_version++;
|
|
count--;
|
|
}
|
|
|
|
printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n",
|
|
acb->host->host_no,
|
|
acb->firm_version);
|
|
|
|
lrwbuffer++;
|
|
acb->firm_request_len = readl(lrwbuffer++);
|
|
/*firm_request_len,1,04-07*/
|
|
acb->firm_numbers_queue = readl(lrwbuffer++);
|
|
/*firm_numbers_queue,2,08-11*/
|
|
acb->firm_sdram_size = readl(lrwbuffer++);
|
|
/*firm_sdram_size,3,12-15*/
|
|
acb->firm_hd_channels = readl(lrwbuffer);
|
|
/*firm_ide_channels,4,16-19*/
|
|
}
|
|
|
|
static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
arcmsr_get_hba_config(acb);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
arcmsr_get_hbb_config(acb);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
|
|
struct CommandControlBlock *poll_ccb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
struct CommandControlBlock *ccb;
|
|
uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
|
|
|
|
polling_hba_ccb_retry:
|
|
poll_count++;
|
|
outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable;
|
|
writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/
|
|
while (1) {
|
|
if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) {
|
|
if (poll_ccb_done)
|
|
break;
|
|
else {
|
|
msleep(25);
|
|
if (poll_count > 100)
|
|
break;
|
|
goto polling_hba_ccb_retry;
|
|
}
|
|
}
|
|
ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
|
|
poll_ccb_done = (ccb == poll_ccb) ? 1:0;
|
|
if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
|
|
if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
|
|
" poll command abort successfully \n"
|
|
, acb->host->host_no
|
|
, ccb->pcmd->device->id
|
|
, ccb->pcmd->device->lun
|
|
, ccb);
|
|
ccb->pcmd->result = DID_ABORT << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
poll_ccb_done = 1;
|
|
continue;
|
|
}
|
|
printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
|
|
" command done ccb = '0x%p'"
|
|
"ccboutstandingcount = %d \n"
|
|
, acb->host->host_no
|
|
, ccb
|
|
, atomic_read(&acb->ccboutstandingcount));
|
|
continue;
|
|
}
|
|
arcmsr_report_ccb_state(acb, ccb, flag_ccb);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
|
|
struct CommandControlBlock *poll_ccb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
struct CommandControlBlock *ccb;
|
|
uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
|
|
int index;
|
|
|
|
polling_hbb_ccb_retry:
|
|
poll_count++;
|
|
/* clear doorbell interrupt */
|
|
writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
|
|
while (1) {
|
|
index = reg->doneq_index;
|
|
if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) {
|
|
if (poll_ccb_done)
|
|
break;
|
|
else {
|
|
msleep(25);
|
|
if (poll_count > 100)
|
|
break;
|
|
goto polling_hbb_ccb_retry;
|
|
}
|
|
}
|
|
writel(0, ®->done_qbuffer[index]);
|
|
index++;
|
|
/*if last index number set it to 0 */
|
|
index %= ARCMSR_MAX_HBB_POSTQUEUE;
|
|
reg->doneq_index = index;
|
|
/* check ifcommand done with no error*/
|
|
ccb = (struct CommandControlBlock *)\
|
|
(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
|
|
poll_ccb_done = (ccb == poll_ccb) ? 1:0;
|
|
if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
|
|
if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: \
|
|
scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n"
|
|
,acb->host->host_no
|
|
,ccb->pcmd->device->id
|
|
,ccb->pcmd->device->lun
|
|
,ccb);
|
|
ccb->pcmd->result = DID_ABORT << 16;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
continue;
|
|
}
|
|
printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
|
|
" command done ccb = '0x%p'"
|
|
"ccboutstandingcount = %d \n"
|
|
, acb->host->host_no
|
|
, ccb
|
|
, atomic_read(&acb->ccboutstandingcount));
|
|
continue;
|
|
}
|
|
arcmsr_report_ccb_state(acb, ccb, flag_ccb);
|
|
} /*drain reply FIFO*/
|
|
}
|
|
|
|
static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
struct CommandControlBlock *poll_ccb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
arcmsr_polling_hba_ccbdone(acb,poll_ccb);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
arcmsr_polling_hbb_ccbdone(acb,poll_ccb);
|
|
}
|
|
}
|
|
}
|
|
|
|
static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t cdb_phyaddr, ccb_phyaddr_hi32;
|
|
dma_addr_t dma_coherent_handle;
|
|
/*
|
|
********************************************************************
|
|
** here we need to tell iop 331 our freeccb.HighPart
|
|
** if freeccb.HighPart is not zero
|
|
********************************************************************
|
|
*/
|
|
dma_coherent_handle = acb->dma_coherent_handle;
|
|
cdb_phyaddr = (uint32_t)(dma_coherent_handle);
|
|
ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
|
|
/*
|
|
***********************************************************************
|
|
** if adapter type B, set window of "post command Q"
|
|
***********************************************************************
|
|
*/
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
if (ccb_phyaddr_hi32 != 0) {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
uint32_t intmask_org;
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
writel(ARCMSR_SIGNATURE_SET_CONFIG, \
|
|
®->message_rwbuffer[0]);
|
|
writel(ccb_phyaddr_hi32, ®->message_rwbuffer[1]);
|
|
writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
|
|
®->inbound_msgaddr0);
|
|
if (arcmsr_hba_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
|
|
part physical address timeout\n",
|
|
acb->host->host_no);
|
|
return 1;
|
|
}
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
}
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
unsigned long post_queue_phyaddr;
|
|
uint32_t __iomem *rwbuffer;
|
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
uint32_t intmask_org;
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
reg->postq_index = 0;
|
|
reg->doneq_index = 0;
|
|
writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg);
|
|
if (arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
|
|
acb->host->host_no);
|
|
return 1;
|
|
}
|
|
post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \
|
|
sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ;
|
|
rwbuffer = reg->msgcode_rwbuffer_reg;
|
|
/* driver "set config" signature */
|
|
writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
|
|
/* normal should be zero */
|
|
writel(ccb_phyaddr_hi32, rwbuffer++);
|
|
/* postQ size (256 + 8)*4 */
|
|
writel(post_queue_phyaddr, rwbuffer++);
|
|
/* doneQ size (256 + 8)*4 */
|
|
writel(post_queue_phyaddr + 1056, rwbuffer++);
|
|
/* ccb maxQ size must be --> [(256 + 8)*4]*/
|
|
writel(1056, rwbuffer);
|
|
|
|
writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg);
|
|
if (arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
|
|
timeout \n",acb->host->host_no);
|
|
return 1;
|
|
}
|
|
|
|
writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg);
|
|
if (arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\
|
|
,acb->host->host_no);
|
|
return 1;
|
|
}
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
}
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t firmware_state = 0;
|
|
|
|
switch (acb->adapter_type) {
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
do {
|
|
firmware_state = readl(®->outbound_msgaddr1);
|
|
} while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
do {
|
|
firmware_state = readl(reg->iop2drv_doorbell_reg);
|
|
} while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
|
|
writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
acb->acb_flags |= ACB_F_MSG_START_BGRB;
|
|
writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0);
|
|
if (arcmsr_hba_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
|
|
rebulid' timeout \n", acb->host->host_no);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
acb->acb_flags |= ACB_F_MSG_START_BGRB;
|
|
writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg);
|
|
if (arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
|
|
rebulid' timeout \n",acb->host->host_no);
|
|
}
|
|
}
|
|
|
|
static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A:
|
|
arcmsr_start_hba_bgrb(acb);
|
|
break;
|
|
case ACB_ADAPTER_TYPE_B:
|
|
arcmsr_start_hbb_bgrb(acb);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
uint32_t outbound_doorbell;
|
|
/* empty doorbell Qbuffer if door bell ringed */
|
|
outbound_doorbell = readl(®->outbound_doorbell);
|
|
/*clear doorbell interrupt */
|
|
writel(outbound_doorbell, ®->outbound_doorbell);
|
|
writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell);
|
|
}
|
|
break;
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
/*clear interrupt and message state*/
|
|
writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
|
|
writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
|
|
/* let IOP know data has been read */
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
|
|
{
|
|
switch (acb->adapter_type) {
|
|
case ACB_ADAPTER_TYPE_A:
|
|
return;
|
|
case ACB_ADAPTER_TYPE_B:
|
|
{
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell_reg);
|
|
if(arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
|
|
return;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
return;
|
|
}
|
|
|
|
static void arcmsr_iop_init(struct AdapterControlBlock *acb)
|
|
{
|
|
uint32_t intmask_org;
|
|
|
|
/* disable all outbound interrupt */
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
arcmsr_wait_firmware_ready(acb);
|
|
arcmsr_iop_confirm(acb);
|
|
arcmsr_get_firmware_spec(acb);
|
|
/*start background rebuild*/
|
|
arcmsr_start_adapter_bgrb(acb);
|
|
/* empty doorbell Qbuffer if door bell ringed */
|
|
arcmsr_clear_doorbell_queue_buffer(acb);
|
|
arcmsr_enable_eoi_mode(acb);
|
|
/* enable outbound Post Queue,outbound doorbell Interrupt */
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
acb->acb_flags |= ACB_F_IOP_INITED;
|
|
}
|
|
|
|
static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
|
|
{
|
|
struct CommandControlBlock *ccb;
|
|
uint32_t intmask_org;
|
|
int i = 0;
|
|
|
|
if (atomic_read(&acb->ccboutstandingcount) != 0) {
|
|
/* talk to iop 331 outstanding command aborted */
|
|
arcmsr_abort_allcmd(acb);
|
|
|
|
/* wait for 3 sec for all command aborted*/
|
|
ssleep(3);
|
|
|
|
/* disable all outbound interrupt */
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
/* clear all outbound posted Q */
|
|
arcmsr_done4abort_postqueue(acb);
|
|
for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
|
|
ccb = acb->pccb_pool[i];
|
|
if (ccb->startdone == ARCMSR_CCB_START) {
|
|
ccb->startdone = ARCMSR_CCB_ABORTED;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
}
|
|
}
|
|
/* enable all outbound interrupt */
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
}
|
|
}
|
|
|
|
static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
|
|
{
|
|
struct AdapterControlBlock *acb =
|
|
(struct AdapterControlBlock *)cmd->device->host->hostdata;
|
|
int i;
|
|
|
|
acb->num_resets++;
|
|
acb->acb_flags |= ACB_F_BUS_RESET;
|
|
for (i = 0; i < 400; i++) {
|
|
if (!atomic_read(&acb->ccboutstandingcount))
|
|
break;
|
|
arcmsr_interrupt(acb);/* FIXME: need spinlock */
|
|
msleep(25);
|
|
}
|
|
arcmsr_iop_reset(acb);
|
|
acb->acb_flags &= ~ACB_F_BUS_RESET;
|
|
return SUCCESS;
|
|
}
|
|
|
|
static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
|
|
struct CommandControlBlock *ccb)
|
|
{
|
|
u32 intmask;
|
|
|
|
ccb->startdone = ARCMSR_CCB_ABORTED;
|
|
|
|
/*
|
|
** Wait for 3 sec for all command done.
|
|
*/
|
|
ssleep(3);
|
|
|
|
intmask = arcmsr_disable_outbound_ints(acb);
|
|
arcmsr_polling_ccbdone(acb, ccb);
|
|
arcmsr_enable_outbound_ints(acb, intmask);
|
|
}
|
|
|
|
static int arcmsr_abort(struct scsi_cmnd *cmd)
|
|
{
|
|
struct AdapterControlBlock *acb =
|
|
(struct AdapterControlBlock *)cmd->device->host->hostdata;
|
|
int i = 0;
|
|
|
|
printk(KERN_NOTICE
|
|
"arcmsr%d: abort device command of scsi id = %d lun = %d \n",
|
|
acb->host->host_no, cmd->device->id, cmd->device->lun);
|
|
acb->num_aborts++;
|
|
/*
|
|
************************************************
|
|
** the all interrupt service routine is locked
|
|
** we need to handle it as soon as possible and exit
|
|
************************************************
|
|
*/
|
|
if (!atomic_read(&acb->ccboutstandingcount))
|
|
return SUCCESS;
|
|
|
|
for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
|
|
struct CommandControlBlock *ccb = acb->pccb_pool[i];
|
|
if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
|
|
arcmsr_abort_one_cmd(acb, ccb);
|
|
break;
|
|
}
|
|
}
|
|
|
|
return SUCCESS;
|
|
}
|
|
|
|
static const char *arcmsr_info(struct Scsi_Host *host)
|
|
{
|
|
struct AdapterControlBlock *acb =
|
|
(struct AdapterControlBlock *) host->hostdata;
|
|
static char buf[256];
|
|
char *type;
|
|
int raid6 = 1;
|
|
|
|
switch (acb->pdev->device) {
|
|
case PCI_DEVICE_ID_ARECA_1110:
|
|
case PCI_DEVICE_ID_ARECA_1200:
|
|
case PCI_DEVICE_ID_ARECA_1202:
|
|
case PCI_DEVICE_ID_ARECA_1210:
|
|
raid6 = 0;
|
|
/*FALLTHRU*/
|
|
case PCI_DEVICE_ID_ARECA_1120:
|
|
case PCI_DEVICE_ID_ARECA_1130:
|
|
case PCI_DEVICE_ID_ARECA_1160:
|
|
case PCI_DEVICE_ID_ARECA_1170:
|
|
case PCI_DEVICE_ID_ARECA_1201:
|
|
case PCI_DEVICE_ID_ARECA_1220:
|
|
case PCI_DEVICE_ID_ARECA_1230:
|
|
case PCI_DEVICE_ID_ARECA_1260:
|
|
case PCI_DEVICE_ID_ARECA_1270:
|
|
case PCI_DEVICE_ID_ARECA_1280:
|
|
type = "SATA";
|
|
break;
|
|
case PCI_DEVICE_ID_ARECA_1380:
|
|
case PCI_DEVICE_ID_ARECA_1381:
|
|
case PCI_DEVICE_ID_ARECA_1680:
|
|
case PCI_DEVICE_ID_ARECA_1681:
|
|
type = "SAS";
|
|
break;
|
|
default:
|
|
type = "X-TYPE";
|
|
break;
|
|
}
|
|
sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
|
|
type, raid6 ? "( RAID6 capable)" : "",
|
|
ARCMSR_DRIVER_VERSION);
|
|
return buf;
|
|
}
|
|
#ifdef CONFIG_SCSI_ARCMSR_AER
|
|
static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev)
|
|
{
|
|
struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
struct AdapterControlBlock *acb =
|
|
(struct AdapterControlBlock *) host->hostdata;
|
|
uint32_t intmask_org;
|
|
int i, j;
|
|
|
|
if (pci_enable_device(pdev)) {
|
|
return PCI_ERS_RESULT_DISCONNECT;
|
|
}
|
|
pci_set_master(pdev);
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
ACB_F_MESSAGE_RQBUFFER_CLEARED |
|
|
ACB_F_MESSAGE_WQBUFFER_READED);
|
|
acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
|
|
for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
|
|
for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
|
|
acb->devstate[i][j] = ARECA_RAID_GONE;
|
|
|
|
arcmsr_wait_firmware_ready(acb);
|
|
arcmsr_iop_confirm(acb);
|
|
/* disable all outbound interrupt */
|
|
arcmsr_get_firmware_spec(acb);
|
|
/*start background rebuild*/
|
|
arcmsr_start_adapter_bgrb(acb);
|
|
/* empty doorbell Qbuffer if door bell ringed */
|
|
arcmsr_clear_doorbell_queue_buffer(acb);
|
|
arcmsr_enable_eoi_mode(acb);
|
|
/* enable outbound Post Queue,outbound doorbell Interrupt */
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
acb->acb_flags |= ACB_F_IOP_INITED;
|
|
|
|
pci_enable_pcie_error_reporting(pdev);
|
|
return PCI_ERS_RESULT_RECOVERED;
|
|
}
|
|
|
|
static void arcmsr_pci_ers_need_reset_forepart(struct pci_dev *pdev)
|
|
{
|
|
struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata;
|
|
struct CommandControlBlock *ccb;
|
|
uint32_t intmask_org;
|
|
int i = 0;
|
|
|
|
if (atomic_read(&acb->ccboutstandingcount) != 0) {
|
|
/* talk to iop 331 outstanding command aborted */
|
|
arcmsr_abort_allcmd(acb);
|
|
/* wait for 3 sec for all command aborted*/
|
|
ssleep(3);
|
|
/* disable all outbound interrupt */
|
|
intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
/* clear all outbound posted Q */
|
|
arcmsr_done4abort_postqueue(acb);
|
|
for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
|
|
ccb = acb->pccb_pool[i];
|
|
if (ccb->startdone == ARCMSR_CCB_START) {
|
|
ccb->startdone = ARCMSR_CCB_ABORTED;
|
|
arcmsr_ccb_complete(ccb, 1);
|
|
}
|
|
}
|
|
/* enable all outbound interrupt */
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
}
|
|
pci_disable_device(pdev);
|
|
}
|
|
|
|
static void arcmsr_pci_ers_disconnect_forepart(struct pci_dev *pdev)
|
|
{
|
|
struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
struct AdapterControlBlock *acb = \
|
|
(struct AdapterControlBlock *)host->hostdata;
|
|
|
|
arcmsr_stop_adapter_bgrb(acb);
|
|
arcmsr_flush_adapter_cache(acb);
|
|
}
|
|
|
|
static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
|
|
pci_channel_state_t state)
|
|
{
|
|
switch (state) {
|
|
case pci_channel_io_frozen:
|
|
arcmsr_pci_ers_need_reset_forepart(pdev);
|
|
return PCI_ERS_RESULT_NEED_RESET;
|
|
case pci_channel_io_perm_failure:
|
|
arcmsr_pci_ers_disconnect_forepart(pdev);
|
|
return PCI_ERS_RESULT_DISCONNECT;
|
|
break;
|
|
default:
|
|
return PCI_ERS_RESULT_NEED_RESET;
|
|
}
|
|
}
|
|
#endif
|