54cebc68c8
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (60 commits) Blackfin arch: make sure we include the fix for SPORT hysteresis when reprogramming clocks Blackfin arch: Fix bogus str_ident check in gpio code Blackfin arch: AD7879 Touchscreen driver Blackfin arch: introducing bfin_addr_dcachable Blackfin arch: fix a typo in comments Blackfin arch: Remove useless head file Blackfin arch: make sure L2 start and length are always defined (fixes building on BF542) Blackfin arch: use the Blackfin on-chip ROM to do software reset when possible Blackfin arch: update anomaly headers to match the latest sheet Blackfin arch: bfin_reset() is an internal reboot function ... everyone should go through machine_restart() Blackfin arch: print out error/warning if you are running on the incorrect CPU type Blackfin arch: remove non-bf54x ifdef logic since this file is only compiled on bf54x parts Blackfin arch: update board defconfigs Blackfin arch: Add optional verbose debug Blackfin arch: emulate a TTY over the EMUDAT/JTAG interface Blackfin arch: have is_user_addr_valid() check for overflows (like when address is -1) Blackfin arch: ptrace - fix off-by-one check on end of memory regions Blackfin arch: Enable framebuffer support for the BF526-EZkit TFT LCD display Blackfin arch: flash memory map and dm9000 resources updating Blackfin arch: early prink code still use uart core console functions to parse and set configure option string ...
165 lines
5.0 KiB
C
165 lines
5.0 KiB
C
/*
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* file: include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
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* based on:
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* author:
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*
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* created:
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* description:
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* blackfin serial driver head file
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* rev:
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*
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* modified:
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*
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*
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* bugs: enter bugs at http://blackfin.uclinux.org/
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*
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* this program is free software; you can redistribute it and/or modify
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* it under the terms of the gnu general public license as published by
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* the free software foundation; either version 2, or (at your option)
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* any later version.
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*
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* this program is distributed in the hope that it will be useful,
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* but without any warranty; without even the implied warranty of
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* merchantability or fitness for a particular purpose. see the
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* gnu general public license for more details.
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*
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* you should have received a copy of the gnu general public license
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* along with this program; see the file copying.
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* if not, write to the free software foundation,
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* 59 temple place - suite 330, boston, ma 02111-1307, usa.
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*/
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#include <linux/serial.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
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#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
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#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
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#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
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#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
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#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
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#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
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#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
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#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
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#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
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#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
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#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
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#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
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#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
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#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
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#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
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#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
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#define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
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#define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
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#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
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#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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# define CONFIG_SERIAL_BFIN_CTSRTS
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# ifndef CONFIG_UART0_CTS_PIN
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# define CONFIG_UART0_CTS_PIN -1
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# endif
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# ifndef CONFIG_UART0_RTS_PIN
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# define CONFIG_UART0_RTS_PIN -1
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# endif
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#endif
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#define BFIN_UART_TX_FIFO_SIZE 2
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struct bfin_serial_port {
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struct uart_port port;
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unsigned int old_status;
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unsigned int lsr;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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int tx_done;
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int tx_count;
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struct circ_buf rx_dma_buf;
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struct timer_list rx_dma_timer;
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int rx_dma_nrows;
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unsigned int tx_dma_channel;
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unsigned int rx_dma_channel;
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struct work_struct tx_dma_workqueue;
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#else
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# if ANOMALY_05000363
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unsigned int anomaly_threshold;
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# endif
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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struct timer_list cts_timer;
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int cts_pin;
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int rts_pin;
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#endif
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};
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/* The hardware clears the LSR bits upon read, so we need to cache
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* some of the more fun bits in software so they don't get lost
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* when checking the LSR in other code paths (TX).
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*/
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static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart)
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{
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unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR);
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uart->lsr |= (lsr & (BI|FE|PE|OE));
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return lsr | uart->lsr;
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}
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static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
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{
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uart->lsr = 0;
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bfin_write16(uart->port.membase + OFFSET_LSR, -1);
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}
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struct bfin_serial_res {
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unsigned long uart_base_addr;
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int uart_irq;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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unsigned int uart_tx_dma_channel;
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unsigned int uart_rx_dma_channel;
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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int uart_cts_pin;
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int uart_rts_pin;
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#endif
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};
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struct bfin_serial_res bfin_serial_resource[] = {
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{
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0xFFC00400,
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IRQ_UART_RX,
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#ifdef CONFIG_SERIAL_BFIN_DMA
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CH_UART_TX,
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CH_UART_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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}
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};
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#define DRIVER_NAME "bfin-uart"
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static void bfin_serial_hw_init(struct bfin_serial_port *uart)
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{
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#ifdef CONFIG_SERIAL_BFIN_UART0
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peripheral_request(P_UART0_TX, DRIVER_NAME);
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peripheral_request(P_UART0_RX, DRIVER_NAME);
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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if (uart->cts_pin >= 0) {
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gpio_request(uart->cts_pin, DRIVER_NAME);
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gpio_direction_input(uart->cts_pin);
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}
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if (uart->rts_pin >= 0) {
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gpio_request(uart->rts_pin, DRIVER_NAME);
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gpio_direction_input(uart->rts_pin, 0);
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}
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#endif
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}
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