0307e8d024
I found that NPTL's pthread_cond_signal() does not work properly on kernels compiled by gcc 4.1.x. I suppose inline asm for __futex_atomic_op() was wrong. I suppose: 1. "=&r" constraint should be used for oldval. 2. Instead of "r" (uaddr), "=R" (*uaddr) for output and "R" (*uaddr) for input should be used. 3. "memory" should be added to the clobber list. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
203 lines
4.9 KiB
C
203 lines
4.9 KiB
C
#ifndef _ASM_FUTEX_H
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#define _ASM_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/config.h>
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#include <linux/futex.h>
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#include <asm/errno.h>
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#include <asm/uaccess.h>
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#include <asm/war.h>
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#ifdef CONFIG_SMP
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#define __FUTEX_SMP_SYNC " sync \n"
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#else
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#define __FUTEX_SMP_SYNC
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#endif
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#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
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{ \
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if (cpu_has_llsc && R10000_LLSC_WAR) { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set mips3 \n" \
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"1: ll %1, %4 # __futex_atomic_op \n" \
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" .set mips0 \n" \
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" " insn " \n" \
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" .set mips3 \n" \
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"2: sc $1, %2 \n" \
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" beqzl $1, 1b \n" \
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__FUTEX_SMP_SYNC \
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"3: \n" \
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" .set pop \n" \
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" .set mips0 \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li %0, %6 \n" \
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" j 2b \n" \
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" .previous \n" \
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" .section __ex_table,\"a\" \n" \
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" "__UA_ADDR "\t1b, 4b \n" \
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" "__UA_ADDR "\t2b, 4b \n" \
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" .previous \n" \
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: "=r" (ret), "=&r" (oldval), "=R" (*uaddr) \
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: "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT) \
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: "memory"); \
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} else if (cpu_has_llsc) { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set mips3 \n" \
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"1: ll %1, %4 # __futex_atomic_op \n" \
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" .set mips0 \n" \
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" " insn " \n" \
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" .set mips3 \n" \
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"2: sc $1, %2 \n" \
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" beqz $1, 1b \n" \
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__FUTEX_SMP_SYNC \
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"3: \n" \
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" .set pop \n" \
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" .set mips0 \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li %0, %6 \n" \
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" j 2b \n" \
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" .previous \n" \
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" .section __ex_table,\"a\" \n" \
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" "__UA_ADDR "\t1b, 4b \n" \
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" "__UA_ADDR "\t2b, 4b \n" \
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" .previous \n" \
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: "=r" (ret), "=&r" (oldval), "=R" (*uaddr) \
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: "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT) \
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: "memory"); \
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} else \
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ret = -ENOSYS; \
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}
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static inline int
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futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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inc_preempt_count();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op("move $1, %z5", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op("addu $1, %1, %z5",
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ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op("or $1, %1, %z5",
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ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op("and $1, %1, %z5",
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ret, oldval, uaddr, ~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op("xor $1, %1, %z5",
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ret, oldval, uaddr, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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dec_preempt_count();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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{
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int retval;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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__asm__ __volatile__(
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"# futex_atomic_cmpxchg_inatomic \n"
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" .set push \n"
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" .set noat \n"
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" .set mips3 \n"
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"1: ll %0, %2 \n"
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" bne %0, %z3, 3f \n"
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" .set mips0 \n"
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" move $1, %z4 \n"
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" .set mips3 \n"
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"2: sc $1, %1 \n"
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" beqzl $1, 1b \n"
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__FUTEX_SMP_SYNC
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"3: \n"
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" .set pop \n"
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" .section .fixup,\"ax\" \n"
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"4: li %0, %5 \n"
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" j 3b \n"
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" .previous \n"
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" .section __ex_table,\"a\" \n"
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" "__UA_ADDR "\t1b, 4b \n"
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" "__UA_ADDR "\t2b, 4b \n"
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" .previous \n"
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: "=&r" (retval), "=R" (*uaddr)
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: "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
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: "memory");
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} else if (cpu_has_llsc) {
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__asm__ __volatile__(
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"# futex_atomic_cmpxchg_inatomic \n"
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" .set push \n"
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" .set noat \n"
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" .set mips3 \n"
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"1: ll %0, %2 \n"
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" bne %0, %z3, 3f \n"
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" .set mips0 \n"
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" move $1, %z4 \n"
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" .set mips3 \n"
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"2: sc $1, %1 \n"
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" beqz $1, 1b \n"
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__FUTEX_SMP_SYNC
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"3: \n"
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" .set pop \n"
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" .section .fixup,\"ax\" \n"
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"4: li %0, %5 \n"
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" j 3b \n"
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" .previous \n"
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" .section __ex_table,\"a\" \n"
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" "__UA_ADDR "\t1b, 4b \n"
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" "__UA_ADDR "\t2b, 4b \n"
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" .previous \n"
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: "=&r" (retval), "=R" (*uaddr)
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: "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
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: "memory");
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} else
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return -ENOSYS;
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return retval;
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}
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#endif
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#endif
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