029cfd6b74
libata lets low level drivers build ata_port_operations table and register it with libata core layer. This allows low level drivers high level of flexibility but also burdens them with lots of boilerplate entries. This becomes worse for drivers which support related similar controllers which differ slightly. They share most of the operations except for a few. However, the driver still needs to list all operations for each variant. This results in large number of duplicate entries, which is not only inefficient but also error-prone as it becomes very difficult to tell what the actual differences are. This duplicate boilerplates all over the low level drivers also make updating the core layer exteremely difficult and error-prone. When compounded with multi-branched development model, it ends up accumulating inconsistencies over time. Some of those inconsistencies cause immediate problems and fixed. Others just remain there dormant making maintenance increasingly difficult. To rectify the problem, this patch implements ata_port_operations inheritance. To allow LLDs to easily re-use their own ops tables overriding only specific methods, this patch implements poor man's class inheritance. An ops table has ->inherits field which can be set to any ops table as long as it doesn't create a loop. When the host is started, the inheritance chain is followed and any operation which isn't specified is taken from the nearest ancestor which has it specified. This operation is called finalization and done only once per an ops table and the LLD doesn't have to do anything special about it other than making the ops table non-const such that libata can update it. libata provides four base ops tables lower drivers can inherit from - base, sata, pmp, sff and bmdma. To avoid overriding these ops accidentaly, these ops are declared const and LLDs should always inherit these instead of using them directly. After finalization, all the ops table are identical before and after the patch except for setting .irq_handler to ata_interrupt in drivers which didn't use to. The .irq_handler doesn't have any actual effect and the field will soon be removed by later patch. * sata_sx4 is still using old style EH and currently doesn't take advantage of ops inheritance. Signed-off-by: Tejun Heo <htejun@gmail.com>
201 lines
4.9 KiB
C
201 lines
4.9 KiB
C
/*
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* pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the
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* PATA port of the controller. The SATA ports are
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* driven by AHCI in the usual configuration although
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* this driver can handle other setups if we need it.
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*
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* (c) 2006 Red Hat <alan@redhat.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/ata.h>
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#define DRV_NAME "pata_jmicron"
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#define DRV_VERSION "0.1.5"
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typedef enum {
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PORT_PATA0 = 0,
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PORT_PATA1 = 1,
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PORT_SATA = 2,
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} port_type;
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/**
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* jmicron_pre_reset - check for 40/80 pin
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* @link: ATA link
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* @deadline: deadline jiffies for the operation
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*
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* Perform the PATA port setup we need.
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*
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* On the Jmicron 361/363 there is a single PATA port that can be mapped
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* either as primary or secondary (or neither). We don't do any policy
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* and setup here. We assume that has been done by init_one and the
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* BIOS.
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*/
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static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline)
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{
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struct ata_port *ap = link->ap;
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u32 control;
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u32 control5;
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int port_mask = 1<< (4 * ap->port_no);
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int port = ap->port_no;
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port_type port_map[2];
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/* Check if our port is enabled */
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pci_read_config_dword(pdev, 0x40, &control);
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if ((control & port_mask) == 0)
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return -ENOENT;
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/* There are two basic mappings. One has the two SATA ports merged
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as master/slave and the secondary as PATA, the other has only the
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SATA port mapped */
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if (control & (1 << 23)) {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_PATA0;
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} else {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_SATA;
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}
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/* The 365/366 may have this bit set to map the second PATA port
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as the internal primary channel */
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pci_read_config_dword(pdev, 0x80, &control5);
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if (control5 & (1<<24))
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port_map[0] = PORT_PATA1;
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/* The two ports may then be logically swapped by the firmware */
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if (control & (1 << 22))
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port = port ^ 1;
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/*
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* Now we know which physical port we are talking about we can
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* actually do our cable checking etc. Thankfully we don't need
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* to do the plumbing for other cases.
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*/
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switch (port_map[port]) {
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case PORT_PATA0:
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if ((control & (1 << 5)) == 0)
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return -ENOENT;
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if (control & (1 << 3)) /* 40/80 pin primary */
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA80;
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break;
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case PORT_PATA1:
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/* Bit 21 is set if the port is enabled */
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if ((control5 & (1 << 21)) == 0)
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return -ENOENT;
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if (control5 & (1 << 19)) /* 40/80 pin secondary */
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ap->cbl = ATA_CBL_PATA40;
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else
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ap->cbl = ATA_CBL_PATA80;
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break;
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case PORT_SATA:
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ap->cbl = ATA_CBL_SATA;
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break;
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}
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return ata_std_prereset(link, deadline);
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}
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/**
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* jmicron_error_handler - Setup and error handler
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* @ap: Port to handle
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*
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* LOCKING:
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* None (inherited from caller).
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*/
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static void jmicron_error_handler(struct ata_port *ap)
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{
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ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL,
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ata_std_postreset);
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}
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/* No PIO or DMA methods needed for this device */
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static struct scsi_host_template jmicron_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations jmicron_ops = {
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.inherits = &ata_bmdma_port_ops,
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.error_handler = jmicron_error_handler,
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};
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/**
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* jmicron_init_one - Register Jmicron ATA PCI device with kernel services
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* @pdev: PCI device to register
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* @ent: Entry in jmicron_pci_tbl matching with @pdev
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*
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* Called from kernel PCI layer.
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*
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* LOCKING:
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* Inherited from PCI layer (may sleep).
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*
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* RETURNS:
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* Zero on success, or -ERRNO value.
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*/
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static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
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{
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static const struct ata_port_info info = {
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.sht = &jmicron_sht,
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.flags = ATA_FLAG_SLAVE_POSS,
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.pio_mask = 0x1f,
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.mwdma_mask = 0x07,
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.udma_mask = ATA_UDMA5,
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.port_ops = &jmicron_ops,
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};
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const struct ata_port_info *ppi[] = { &info, NULL };
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return ata_pci_init_one(pdev, ppi);
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}
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static const struct pci_device_id jmicron_pci_tbl[] = {
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
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{ } /* terminate list */
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};
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static struct pci_driver jmicron_pci_driver = {
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.name = DRV_NAME,
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.id_table = jmicron_pci_tbl,
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.probe = jmicron_init_one,
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.remove = ata_pci_remove_one,
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#ifdef CONFIG_PM
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.suspend = ata_pci_device_suspend,
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.resume = ata_pci_device_resume,
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#endif
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};
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static int __init jmicron_init(void)
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{
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return pci_register_driver(&jmicron_pci_driver);
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}
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static void __exit jmicron_exit(void)
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{
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pci_unregister_driver(&jmicron_pci_driver);
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}
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module_init(jmicron_init);
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module_exit(jmicron_exit);
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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