a09e64fbc0
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
174 lines
4.5 KiB
C
174 lines
4.5 KiB
C
/*
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* arch/arm/mach-ixp4xx/include/mach/platform.h
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*
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* Constants and functions that are useful to IXP4xx platform-specific code
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* and device drivers.
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*
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* Copyright (C) 2004 MontaVista Software, Inc.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <mach/hardware.h>"
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#endif
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#ifndef __ASSEMBLY__
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#include <asm/types.h>
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#ifndef __ARMEB__
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#define REG_OFFSET 0
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#else
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#define REG_OFFSET 3
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#endif
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/*
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* Expansion bus memory regions
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*/
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#define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000)
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/*
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* The expansion bus on the IXP4xx can be configured for either 16 or
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* 32MB windows and the CS offset for each region changes based on the
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* current configuration. This means that we cannot simply hardcode
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* each offset. ixp4xx_sys_init() looks at the expansion bus configuration
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* as setup by the bootloader to determine our window size.
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*/
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extern unsigned long ixp4xx_exp_bus_size;
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#define IXP4XX_EXP_BUS_BASE(region)\
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(IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
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#define IXP4XX_EXP_BUS_END(region)\
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(IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1)
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/* Those macros can be used to adjust timing and configure
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* other features for each region.
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*/
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#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16)
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#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20)
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#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22)
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#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26)
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#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28)
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#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10)
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#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14)
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#define IXP4XX_EXP_BUS_CS_EN (1L << 31)
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#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6)
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#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5)
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#define IXP4XX_EXP_BUS_MUX_EN (1L << 4)
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#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3)
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#define IXP4XX_EXP_BUS_WR_EN (1L << 1)
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#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0)
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#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00
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#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01
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#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02
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#define IXP4XX_FLASH_WRITABLE (0x2)
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#define IXP4XX_FLASH_DEFAULT (0xbcd23c40)
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#define IXP4XX_FLASH_WRITE (0xbcd23c42)
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/*
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* Clock Speed Definitions.
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*/
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#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */
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#define IXP4XX_UART_XTAL 14745600
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/*
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* This structure provide a means for the board setup code
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* to give information to th pata_ixp4xx driver. It is
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* passed as platform_data.
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*/
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struct ixp4xx_pata_data {
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volatile u32 *cs0_cfg;
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volatile u32 *cs1_cfg;
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unsigned long cs0_bits;
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unsigned long cs1_bits;
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void __iomem *cs0;
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void __iomem *cs1;
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};
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struct sys_timer;
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#define IXP4XX_ETH_NPEA 0x00
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#define IXP4XX_ETH_NPEB 0x10
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#define IXP4XX_ETH_NPEC 0x20
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/* Information about built-in Ethernet MAC interfaces */
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struct eth_plat_info {
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u8 phy; /* MII PHY ID, 0 - 31 */
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u8 rxq; /* configurable, currently 0 - 31 only */
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u8 txreadyq;
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u8 hwaddr[6];
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};
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/* Information about built-in HSS (synchronous serial) interfaces */
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struct hss_plat_info {
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int (*set_clock)(int port, unsigned int clock_type);
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int (*open)(int port, void *pdev,
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void (*set_carrier_cb)(void *pdev, int carrier));
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void (*close)(int port, void *pdev);
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u8 txreadyq;
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};
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/*
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* Frequency of clock used for primary clocksource
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*/
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extern unsigned long ixp4xx_timer_freq;
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/*
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* Functions used by platform-level setup code
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*/
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extern void ixp4xx_map_io(void);
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extern void ixp4xx_init_irq(void);
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extern void ixp4xx_sys_init(void);
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extern void ixp4xx_timer_init(void);
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extern struct sys_timer ixp4xx_timer;
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extern void ixp4xx_pci_preinit(void);
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struct pci_sys_data;
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extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
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extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
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/*
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* GPIO-functions
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*/
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/*
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* The following converted to the real HW bits the gpio_line_config
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*/
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/* GPIO pin types */
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#define IXP4XX_GPIO_OUT 0x1
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#define IXP4XX_GPIO_IN 0x2
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/* GPIO signal types */
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#define IXP4XX_GPIO_LOW 0
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#define IXP4XX_GPIO_HIGH 1
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/* GPIO Clocks */
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#define IXP4XX_GPIO_CLK_0 14
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#define IXP4XX_GPIO_CLK_1 15
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static inline void gpio_line_config(u8 line, u32 direction)
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{
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if (direction == IXP4XX_GPIO_IN)
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*IXP4XX_GPIO_GPOER |= (1 << line);
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else
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*IXP4XX_GPIO_GPOER &= ~(1 << line);
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}
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static inline void gpio_line_get(u8 line, int *value)
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{
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*value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
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}
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static inline void gpio_line_set(u8 line, int value)
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{
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if (value == IXP4XX_GPIO_HIGH)
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*IXP4XX_GPIO_GPOUTR |= (1 << line);
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else if (value == IXP4XX_GPIO_LOW)
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*IXP4XX_GPIO_GPOUTR &= ~(1 << line);
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}
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#endif // __ASSEMBLY__
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