cd354f1ae7
After Al Viro (finally) succeeded in removing the sched.h #include in module.h recently, it makes sense again to remove other superfluous sched.h includes. There are quite a lot of files which include it but don't actually need anything defined in there. Presumably these includes were once needed for macros that used to live in sched.h, but moved to other header files in the course of cleaning it up. To ease the pain, this time I did not fiddle with any header files and only removed #includes from .c-files, which tend to cause less trouble. Compile tested against 2.6.20-rc2 and 2.6.20-rc2-mm2 (with offsets) on alpha, arm, i386, ia64, mips, powerpc, and x86_64 with allnoconfig, defconfig, allmodconfig, and allyesconfig as well as a few randconfigs on x86_64 and all configs in arch/arm/configs on arm. I also checked that no new warnings were introduced by the patch (actually, some warnings are removed that were emitted by unnecessarily included header files). Signed-off-by: Tim Schmielau <tim@physik3.uni-rostock.de> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
428 lines
11 KiB
C
428 lines
11 KiB
C
/*
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amd756.c - Part of lm_sensors, Linux kernel modules for hardware
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monitoring
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Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
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Shamelessly ripped from i2c-piix4.c:
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Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
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Philip Edelbrock <phil@netroedge.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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2002-04-08: Added nForce support. (Csaba Halasz)
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2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
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2002-12-28: Rewritten into something that resembles a Linux driver (hch)
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2003-11-29: Added back AMD8111 removed by the previous rewrite.
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(Philip Pokorny)
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*/
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/*
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Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
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Note: we assume there can only be one device, with one SMBus interface.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <asm/io.h>
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/* AMD756 SMBus address offsets */
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#define SMB_ADDR_OFFSET 0xE0
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#define SMB_IOSIZE 16
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#define SMB_GLOBAL_STATUS (0x0 + amd756_ioport)
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#define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport)
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#define SMB_HOST_ADDRESS (0x4 + amd756_ioport)
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#define SMB_HOST_DATA (0x6 + amd756_ioport)
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#define SMB_HOST_COMMAND (0x8 + amd756_ioport)
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#define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
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#define SMB_HAS_DATA (0xA + amd756_ioport)
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#define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
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#define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport)
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#define SMB_SNOOP_ADDRESS (0xF + amd756_ioport)
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/* PCI Address Constants */
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/* address of I/O space */
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#define SMBBA 0x058 /* mh */
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#define SMBBANFORCE 0x014
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/* general configuration */
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#define SMBGCFG 0x041 /* mh */
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/* silicon revision code */
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#define SMBREV 0x008
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/* Other settings */
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#define MAX_TIMEOUT 500
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/* AMD756 constants */
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#define AMD756_QUICK 0x00
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#define AMD756_BYTE 0x01
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#define AMD756_BYTE_DATA 0x02
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#define AMD756_WORD_DATA 0x03
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#define AMD756_PROCESS_CALL 0x04
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#define AMD756_BLOCK_DATA 0x05
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static struct pci_driver amd756_driver;
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static unsigned short amd756_ioport;
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/*
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SMBUS event = I/O 28-29 bit 11
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see E0 for the status bits and enabled in E2
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*/
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#define GS_ABRT_STS (1 << 0)
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#define GS_COL_STS (1 << 1)
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#define GS_PRERR_STS (1 << 2)
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#define GS_HST_STS (1 << 3)
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#define GS_HCYC_STS (1 << 4)
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#define GS_TO_STS (1 << 5)
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#define GS_SMB_STS (1 << 11)
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#define GS_CLEAR_STS (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
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GS_HCYC_STS | GS_TO_STS )
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#define GE_CYC_TYPE_MASK (7)
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#define GE_HOST_STC (1 << 3)
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#define GE_ABORT (1 << 5)
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static int amd756_transaction(struct i2c_adapter *adap)
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{
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int temp;
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int result = 0;
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int timeout = 0;
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dev_dbg(&adap->dev, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
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"DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS),
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inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS),
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inb_p(SMB_HOST_DATA));
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/* Make sure the SMBus host is ready to start transmitting */
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if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
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dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp);
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do {
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msleep(1);
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temp = inw_p(SMB_GLOBAL_STATUS);
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} while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
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(timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp);
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goto abort;
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}
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timeout = 0;
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}
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/* start the transaction by setting the start bit */
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outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE);
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/* We will always wait for a fraction of a second! */
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do {
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msleep(1);
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temp = inw_p(SMB_GLOBAL_STATUS);
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} while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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dev_dbg(&adap->dev, "Completion timeout!\n");
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goto abort;
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}
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if (temp & GS_PRERR_STS) {
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result = -1;
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dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
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}
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if (temp & GS_COL_STS) {
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result = -1;
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dev_warn(&adap->dev, "SMBus collision!\n");
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}
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if (temp & GS_TO_STS) {
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result = -1;
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dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
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}
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if (temp & GS_HCYC_STS)
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dev_dbg(&adap->dev, "SMBus protocol success!\n");
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outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
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#ifdef DEBUG
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if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
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dev_dbg(&adap->dev,
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"Failed reset at end of transaction (%04x)\n", temp);
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}
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#endif
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dev_dbg(&adap->dev,
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"Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
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inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
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inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
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return result;
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abort:
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dev_warn(&adap->dev, "Sending abort\n");
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outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
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msleep(100);
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outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
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return -1;
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}
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/* Return -1 on error. */
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static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data * data)
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{
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int i, len;
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/** TODO: Should I supporte the 10-bit transfers? */
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switch (size) {
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case I2C_SMBUS_PROC_CALL:
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dev_dbg(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
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/* TODO: Well... It is supported, I'm just not sure what to do here... */
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return -1;
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case I2C_SMBUS_QUICK:
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outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMB_HOST_ADDRESS);
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size = AMD756_QUICK;
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break;
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case I2C_SMBUS_BYTE:
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outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMB_HOST_ADDRESS);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(command, SMB_HOST_DATA);
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size = AMD756_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMB_HOST_ADDRESS);
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outb_p(command, SMB_HOST_COMMAND);
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if (read_write == I2C_SMBUS_WRITE)
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outw_p(data->byte, SMB_HOST_DATA);
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size = AMD756_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMB_HOST_ADDRESS);
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outb_p(command, SMB_HOST_COMMAND);
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if (read_write == I2C_SMBUS_WRITE)
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outw_p(data->word, SMB_HOST_DATA); /* TODO: endian???? */
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size = AMD756_WORD_DATA;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMB_HOST_ADDRESS);
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outb_p(command, SMB_HOST_COMMAND);
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if (read_write == I2C_SMBUS_WRITE) {
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len = data->block[0];
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if (len < 0)
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len = 0;
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if (len > 32)
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len = 32;
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outw_p(len, SMB_HOST_DATA);
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/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
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for (i = 1; i <= len; i++)
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outb_p(data->block[i],
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SMB_HOST_BLOCK_DATA);
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}
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size = AMD756_BLOCK_DATA;
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break;
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}
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/* How about enabling interrupts... */
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outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
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if (amd756_transaction(adap)) /* Error in transaction */
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return -1;
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if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
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return 0;
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switch (size) {
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case AMD756_BYTE:
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data->byte = inw_p(SMB_HOST_DATA);
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break;
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case AMD756_BYTE_DATA:
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data->byte = inw_p(SMB_HOST_DATA);
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break;
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case AMD756_WORD_DATA:
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data->word = inw_p(SMB_HOST_DATA); /* TODO: endian???? */
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break;
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case AMD756_BLOCK_DATA:
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data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
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if(data->block[0] > 32)
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data->block[0] = 32;
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/* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
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for (i = 1; i <= data->block[0]; i++)
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data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
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break;
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}
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return 0;
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}
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static u32 amd756_func(struct i2c_adapter *adapter)
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{
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return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL;
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}
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static const struct i2c_algorithm smbus_algorithm = {
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.smbus_xfer = amd756_access,
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.functionality = amd756_func,
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};
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struct i2c_adapter amd756_smbus = {
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.owner = THIS_MODULE,
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.id = I2C_HW_SMBUS_AMD756,
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.class = I2C_CLASS_HWMON,
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.algo = &smbus_algorithm,
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};
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enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
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static const char* chipname[] = {
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"AMD756", "AMD766", "AMD768",
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"nVidia nForce", "AMD8111",
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};
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static struct pci_device_id amd756_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
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.driver_data = AMD756 },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
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.driver_data = AMD766 },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443),
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.driver_data = AMD768 },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS),
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.driver_data = AMD8111 },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS),
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.driver_data = NFORCE },
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{ 0, }
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};
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MODULE_DEVICE_TABLE (pci, amd756_ids);
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static int __devinit amd756_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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int nforce = (id->driver_data == NFORCE);
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int error;
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u8 temp;
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if (amd756_ioport) {
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dev_err(&pdev->dev, "Only one device supported "
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"(you have a strange motherboard, btw)\n");
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return -ENODEV;
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}
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if (nforce) {
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if (PCI_FUNC(pdev->devfn) != 1)
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return -ENODEV;
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pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
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amd756_ioport &= 0xfffc;
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} else { /* amd */
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if (PCI_FUNC(pdev->devfn) != 3)
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return -ENODEV;
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pci_read_config_byte(pdev, SMBGCFG, &temp);
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if ((temp & 128) == 0) {
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dev_err(&pdev->dev,
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"Error: SMBus controller I/O not enabled!\n");
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return -ENODEV;
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}
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/* Determine the address of the SMBus areas */
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/* Technically it is a dword but... */
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pci_read_config_word(pdev, SMBBA, &amd756_ioport);
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amd756_ioport &= 0xff00;
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amd756_ioport += SMB_ADDR_OFFSET;
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}
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if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
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dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
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amd756_ioport);
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return -ENODEV;
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}
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pci_read_config_byte(pdev, SMBREV, &temp);
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dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp);
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dev_dbg(&pdev->dev, "AMD756_smba = 0x%X\n", amd756_ioport);
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/* set up the driverfs linkage to our parent device */
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amd756_smbus.dev.parent = &pdev->dev;
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sprintf(amd756_smbus.name, "SMBus %s adapter at %04x",
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chipname[id->driver_data], amd756_ioport);
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error = i2c_add_adapter(&amd756_smbus);
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if (error) {
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dev_err(&pdev->dev,
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"Adapter registration failed, module not inserted\n");
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goto out_err;
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}
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return 0;
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out_err:
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release_region(amd756_ioport, SMB_IOSIZE);
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return error;
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}
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static void __devexit amd756_remove(struct pci_dev *dev)
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{
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i2c_del_adapter(&amd756_smbus);
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release_region(amd756_ioport, SMB_IOSIZE);
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}
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static struct pci_driver amd756_driver = {
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.name = "amd756_smbus",
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.id_table = amd756_ids,
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.probe = amd756_probe,
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.remove = __devexit_p(amd756_remove),
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};
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static int __init amd756_init(void)
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{
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return pci_register_driver(&amd756_driver);
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}
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static void __exit amd756_exit(void)
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{
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pci_unregister_driver(&amd756_driver);
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}
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MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
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MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
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MODULE_LICENSE("GPL");
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EXPORT_SYMBOL(amd756_smbus);
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module_init(amd756_init)
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module_exit(amd756_exit)
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