0b7c607502
Some Exynos based SoCs like Tensor gs101 protect the PMU registers for security hardening reasons so that they are only write accessible in el3 via an SMC call. As most Exynos drivers that need to write PMU registers currently obtain a regmap via syscon (phys, pinctrl, watchdog). Support for the above usecase is implemented in this driver using a custom regmap similar to syscon to handle the SMC call. Platforms that don't secure PMU registers, get a mmio regmap like before. As regmaps abstract out the underlying register access changes to the leaf drivers are minimal. A new API exynos_get_pmu_regmap_by_phandle() is provided for leaf drivers that currently use syscon_regmap_lookup_by_phandle(). This also handles deferred probing. Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Alexey Klimov <alexey.klimov@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240220220613.797068-2-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
79 lines
2.5 KiB
Plaintext
79 lines
2.5 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Samsung SoC drivers
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#
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menuconfig SOC_SAMSUNG
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bool "Samsung SoC driver support" if COMPILE_TEST
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if SOC_SAMSUNG
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# There is no need to enable these drivers for ARMv8
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config EXYNOS_ASV_ARM
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bool "Exynos ASV ARMv7-specific driver extensions" if COMPILE_TEST
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depends on EXYNOS_CHIPID
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config EXYNOS_CHIPID
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tristate "Exynos ChipID controller and ASV driver"
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depends on ARCH_EXYNOS || COMPILE_TEST
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default ARCH_EXYNOS
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select EXYNOS_ASV_ARM if ARM && ARCH_EXYNOS
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select MFD_SYSCON
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select SOC_BUS
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help
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Support for Samsung Exynos SoC ChipID and Adaptive Supply Voltage.
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This driver can also be built as module (exynos_chipid).
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config EXYNOS_USI
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tristate "Exynos USI (Universal Serial Interface) driver"
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default ARCH_EXYNOS && ARM64
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depends on ARCH_EXYNOS || COMPILE_TEST
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select MFD_SYSCON
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help
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Enable support for USI block. USI (Universal Serial Interface) is an
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IP-core found in modern Samsung Exynos SoCs, like Exynos850 and
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ExynosAutoV9. USI block can be configured to provide one of the
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following serial protocols: UART, SPI or High Speed I2C.
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This driver allows one to configure USI for desired protocol, which
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is usually done in USI node in Device Tree.
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config EXYNOS_PMU
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bool "Exynos PMU controller driver" if COMPILE_TEST
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depends on ARCH_EXYNOS || ((ARM || ARM64) && COMPILE_TEST)
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select EXYNOS_PMU_ARM_DRIVERS if ARM && ARCH_EXYNOS
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select MFD_CORE
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select REGMAP_MMIO
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# There is no need to enable these drivers for ARMv8
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config EXYNOS_PMU_ARM_DRIVERS
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bool "Exynos PMU ARMv7-specific driver extensions" if COMPILE_TEST
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depends on EXYNOS_PMU
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config SAMSUNG_PM_CHECK
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bool "S3C2410 PM Suspend Memory CRC"
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depends on PM && (ARCH_S3C64XX || ARCH_S5PV210)
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select CRC32
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help
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Enable the PM code's memory area checksum over sleep. This option
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will generate CRCs of all blocks of memory, and store them before
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going to sleep. The blocks are then checked on resume for any
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errors.
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Note, this can take several seconds depending on memory size
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and CPU speed.
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config SAMSUNG_PM_CHECK_CHUNKSIZE
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int "S3C2410 PM Suspend CRC Chunksize (KiB)"
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depends on PM && SAMSUNG_PM_CHECK
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default 64
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help
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Set the chunksize in Kilobytes of the CRC for checking memory
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corruption over suspend and resume. A smaller value will mean that
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the CRC data block will take more memory, but will identify any
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faults with better precision.
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config EXYNOS_REGULATOR_COUPLER
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bool "Exynos SoC Regulator Coupler" if COMPILE_TEST
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depends on ARCH_EXYNOS || COMPILE_TEST
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endif
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