c3d98b12ee
The device does not come online when the target port is online. There were
multiple RSCNs indicating multiple devices were affected. Driver is in the
process of finishing a fabric scan. A new RSCN (device up) arrived at the
tail end of the last fabric scan. Driver mistakenly thinks the new RSCN is
being taken care of by the previous fabric scan, where this notification is
cleared and not acted on. The laser needs to be blinked again to get the
device to show up.
To prevent driver from accidentally clearing the RSCN notification, each
RSCN is given a generation value. A fabric scan will scan for that
generation(s). Any new RSCN arrive after the scan start will have a new
generation value. This will trigger another scan to get latest data. The
RSCN notification flag will be cleared when the scan is associate to that
generation.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202406210538.w875N70K-lkp@intel.com/
Fixes: bb2ca6b3f0
("scsi: qla2xxx: Relogin during fabric disturbance")
Cc: stable@vger.kernel.org
Signed-off-by: Quinn Tran <qutran@marvell.com>
Signed-off-by: Nilesh Javali <njavali@marvell.com>
Link: https://lore.kernel.org/r/20240710171057.35066-2-njavali@marvell.com
Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
642 lines
14 KiB
C
642 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* QLogic Fibre Channel HBA Driver
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* Copyright (c) 2003-2014 QLogic Corporation
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*/
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#include "qla_target.h"
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/**
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* qla24xx_calc_iocbs() - Determine number of Command Type 3 and
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* Continuation Type 1 IOCBs to allocate.
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*
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* @vha: HA context
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* @dsds: number of data segment descriptors needed
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*
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* Returns the number of IOCB entries needed to store @dsds.
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*/
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static inline uint16_t
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qla24xx_calc_iocbs(scsi_qla_host_t *vha, uint16_t dsds)
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{
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uint16_t iocbs;
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iocbs = 1;
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if (dsds > 1) {
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iocbs += (dsds - 1) / 5;
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if ((dsds - 1) % 5)
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iocbs++;
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}
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return iocbs;
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}
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/*
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* qla2x00_debounce_register
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* Debounce register.
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*
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* Input:
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* port = register address.
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*
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* Returns:
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* register value.
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*/
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static __inline__ uint16_t
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qla2x00_debounce_register(volatile __le16 __iomem *addr)
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{
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volatile uint16_t first;
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volatile uint16_t second;
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do {
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first = rd_reg_word(addr);
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barrier();
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cpu_relax();
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second = rd_reg_word(addr);
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} while (first != second);
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return (first);
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}
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static inline void
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qla2x00_poll(struct rsp_que *rsp)
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{
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struct qla_hw_data *ha = rsp->hw;
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if (IS_P3P_TYPE(ha))
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qla82xx_poll(0, rsp);
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else
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ha->isp_ops->intr_handler(0, rsp);
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}
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static inline uint8_t *
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host_to_fcp_swap(uint8_t *fcp, uint32_t bsize)
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{
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uint32_t *ifcp = (uint32_t *) fcp;
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uint32_t *ofcp = (uint32_t *) fcp;
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uint32_t iter = bsize >> 2;
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for (; iter ; iter--)
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*ofcp++ = swab32(*ifcp++);
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return fcp;
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}
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static inline void
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host_to_adap(uint8_t *src, uint8_t *dst, uint32_t bsize)
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{
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uint32_t *isrc = (uint32_t *) src;
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__le32 *odest = (__le32 *) dst;
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uint32_t iter = bsize >> 2;
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for ( ; iter--; isrc++)
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*odest++ = cpu_to_le32(*isrc);
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}
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static inline void
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qla2x00_clean_dsd_pool(struct qla_hw_data *ha, struct crc_context *ctx)
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{
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struct dsd_dma *dsd, *tdsd;
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/* clean up allocated prev pool */
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list_for_each_entry_safe(dsd, tdsd, &ctx->dsd_list, list) {
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dma_pool_free(ha->dl_dma_pool, dsd->dsd_addr,
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dsd->dsd_list_dma);
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list_del(&dsd->list);
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kfree(dsd);
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}
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INIT_LIST_HEAD(&ctx->dsd_list);
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}
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static inline void
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qla2x00_set_fcport_disc_state(fc_port_t *fcport, int state)
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{
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int old_val;
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uint8_t shiftbits, mask;
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uint8_t port_dstate_str_sz;
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/* This will have to change when the max no. of states > 16 */
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shiftbits = 4;
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mask = (1 << shiftbits) - 1;
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port_dstate_str_sz = sizeof(port_dstate_str) / sizeof(char *);
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fcport->disc_state = state;
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while (1) {
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old_val = atomic_read(&fcport->shadow_disc_state);
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if (old_val == atomic_cmpxchg(&fcport->shadow_disc_state,
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old_val, (old_val << shiftbits) | state)) {
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ql_dbg(ql_dbg_disc, fcport->vha, 0x2134,
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"FCPort %8phC disc_state transition: %s to %s - portid=%06x.\n",
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fcport->port_name, (old_val & mask) < port_dstate_str_sz ?
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port_dstate_str[old_val & mask] : "Unknown",
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port_dstate_str[state], fcport->d_id.b24);
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return;
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}
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}
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}
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static inline int
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qla2x00_hba_err_chk_enabled(srb_t *sp)
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{
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/*
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* Uncomment when corresponding SCSI changes are done.
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*
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if (!sp->cmd->prot_chk)
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return 0;
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*
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*/
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switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
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case SCSI_PROT_READ_STRIP:
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case SCSI_PROT_WRITE_INSERT:
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if (ql2xenablehba_err_chk >= 1)
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return 1;
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break;
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case SCSI_PROT_READ_PASS:
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case SCSI_PROT_WRITE_PASS:
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if (ql2xenablehba_err_chk >= 2)
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return 1;
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break;
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case SCSI_PROT_READ_INSERT:
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case SCSI_PROT_WRITE_STRIP:
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return 1;
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}
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return 0;
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}
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static inline int
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qla2x00_reset_active(scsi_qla_host_t *vha)
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{
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scsi_qla_host_t *base_vha = pci_get_drvdata(vha->hw->pdev);
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/* Test appropriate base-vha and vha flags. */
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return test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) ||
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test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
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test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
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test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
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test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
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}
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static inline int
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qla2x00_chip_is_down(scsi_qla_host_t *vha)
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{
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return (qla2x00_reset_active(vha) || !vha->hw->flags.fw_started);
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}
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static void qla2xxx_init_sp(srb_t *sp, scsi_qla_host_t *vha,
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struct qla_qpair *qpair, fc_port_t *fcport)
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{
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memset(sp, 0, sizeof(*sp));
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sp->fcport = fcport;
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sp->iocbs = 1;
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sp->vha = vha;
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sp->qpair = qpair;
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sp->cmd_type = TYPE_SRB;
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/* ref : INIT - normal flow */
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kref_init(&sp->cmd_kref);
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INIT_LIST_HEAD(&sp->elem);
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}
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static inline srb_t *
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qla2xxx_get_qpair_sp(scsi_qla_host_t *vha, struct qla_qpair *qpair,
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fc_port_t *fcport, gfp_t flag)
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{
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srb_t *sp = NULL;
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uint8_t bail;
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QLA_QPAIR_MARK_BUSY(qpair, bail);
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if (unlikely(bail))
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return NULL;
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sp = mempool_alloc(qpair->srb_mempool, flag);
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if (sp)
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qla2xxx_init_sp(sp, vha, qpair, fcport);
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else
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QLA_QPAIR_MARK_NOT_BUSY(qpair);
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return sp;
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}
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void qla2xxx_rel_done_warning(srb_t *sp, int res);
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void qla2xxx_rel_free_warning(srb_t *sp);
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static inline void
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qla2xxx_rel_qpair_sp(struct qla_qpair *qpair, srb_t *sp)
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{
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sp->qpair = NULL;
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sp->done = qla2xxx_rel_done_warning;
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sp->free = qla2xxx_rel_free_warning;
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mempool_free(sp, qpair->srb_mempool);
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QLA_QPAIR_MARK_NOT_BUSY(qpair);
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}
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static inline srb_t *
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qla2x00_get_sp(scsi_qla_host_t *vha, fc_port_t *fcport, gfp_t flag)
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{
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srb_t *sp = NULL;
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struct qla_qpair *qpair;
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if (unlikely(qla_vha_mark_busy(vha)))
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return NULL;
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qpair = vha->hw->base_qpair;
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sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, flag);
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if (!sp)
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goto done;
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sp->vha = vha;
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done:
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if (!sp)
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QLA_VHA_MARK_NOT_BUSY(vha);
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return sp;
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}
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static inline void
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qla2x00_rel_sp(srb_t *sp)
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{
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QLA_VHA_MARK_NOT_BUSY(sp->vha);
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qla2xxx_rel_qpair_sp(sp->qpair, sp);
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}
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static inline int
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qla2x00_gid_list_size(struct qla_hw_data *ha)
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{
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if (IS_QLAFX00(ha))
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return sizeof(uint32_t) * 32;
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else
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return sizeof(struct gid_list_info) * ha->max_fibre_devices;
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}
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static inline void
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qla2x00_handle_mbx_completion(struct qla_hw_data *ha, int status)
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{
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
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complete(&ha->mbx_intr_comp);
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}
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}
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static inline void
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qla2x00_set_retry_delay_timestamp(fc_port_t *fcport, uint16_t sts_qual)
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{
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u8 scope;
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u16 qual;
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#define SQ_SCOPE_MASK 0xc000 /* SAM-6 rev5 5.3.2 */
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#define SQ_SCOPE_SHIFT 14
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#define SQ_QUAL_MASK 0x3fff
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#define SQ_MAX_WAIT_SEC 60 /* Max I/O hold off time in seconds. */
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#define SQ_MAX_WAIT_TIME (SQ_MAX_WAIT_SEC * 10) /* in 100ms. */
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if (!sts_qual) /* Common case. */
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return;
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scope = (sts_qual & SQ_SCOPE_MASK) >> SQ_SCOPE_SHIFT;
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/* Handle only scope 1 or 2, which is for I-T nexus. */
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if (scope != 1 && scope != 2)
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return;
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/* Skip processing, if retry delay timer is already in effect. */
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if (fcport->retry_delay_timestamp &&
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time_before(jiffies, fcport->retry_delay_timestamp))
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return;
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qual = sts_qual & SQ_QUAL_MASK;
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if (qual < 1 || qual > 0x3fef)
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return;
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qual = min(qual, (u16)SQ_MAX_WAIT_TIME);
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/* qual is expressed in 100ms increments. */
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fcport->retry_delay_timestamp = jiffies + (qual * HZ / 10);
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ql_log(ql_log_warn, fcport->vha, 0x5101,
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"%8phC: I/O throttling requested (status qualifier = %04xh), holding off I/Os for %ums.\n",
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fcport->port_name, sts_qual, qual * 100);
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}
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static inline bool
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qla_is_exch_offld_enabled(struct scsi_qla_host *vha)
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{
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if (qla_ini_mode_enabled(vha) &&
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(vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT))
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return true;
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else if (qla_tgt_mode_enabled(vha) &&
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(vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT))
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return true;
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else if (qla_dual_mode_enabled(vha) &&
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((vha->ql2xiniexchg + vha->ql2xexchoffld) > FW_DEF_EXCHANGES_CNT))
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return true;
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else
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return false;
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}
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static inline void
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qla_cpu_update(struct qla_qpair *qpair, uint16_t cpuid)
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{
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qpair->cpuid = cpuid;
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if (!list_empty(&qpair->hints_list)) {
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struct qla_qpair_hint *h;
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list_for_each_entry(h, &qpair->hints_list, hint_elem)
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h->cpuid = qpair->cpuid;
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}
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}
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static inline struct qla_qpair_hint *
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qla_qpair_to_hint(struct qla_tgt *tgt, struct qla_qpair *qpair)
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{
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struct qla_qpair_hint *h;
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u16 i;
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for (i = 0; i < tgt->ha->max_qpairs + 1; i++) {
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h = &tgt->qphints[i];
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if (h->qpair == qpair)
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return h;
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}
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return NULL;
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}
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static inline void
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qla_83xx_start_iocbs(struct qla_qpair *qpair)
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{
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struct req_que *req = qpair->req;
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req->ring_index++;
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if (req->ring_index == req->length) {
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req->ring_index = 0;
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req->ring_ptr = req->ring;
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} else
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req->ring_ptr++;
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wrt_reg_dword(req->req_q_in, req->ring_index);
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}
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static inline int
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qla2xxx_get_fc4_priority(struct scsi_qla_host *vha)
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{
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uint32_t data;
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data =
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((uint8_t *)vha->hw->nvram)[NVRAM_DUAL_FCP_NVME_FLAG_OFFSET];
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return (data >> 6) & BIT_0 ? FC4_PRIORITY_FCP : FC4_PRIORITY_NVME;
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}
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enum {
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RESOURCE_NONE,
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RESOURCE_IOCB = BIT_0,
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RESOURCE_EXCH = BIT_1, /* exchange */
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RESOURCE_FORCE = BIT_2,
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RESOURCE_HA = BIT_3,
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};
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static inline int
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qla_get_fw_resources(struct qla_qpair *qp, struct iocb_resource *iores)
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{
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u16 iocbs_used, i;
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u16 exch_used;
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struct qla_hw_data *ha = qp->hw;
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if (!ql2xenforce_iocb_limit) {
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iores->res_type = RESOURCE_NONE;
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return 0;
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}
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if (iores->res_type & RESOURCE_FORCE)
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goto force;
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if ((iores->iocb_cnt + qp->fwres.iocbs_used) >= qp->fwres.iocbs_qp_limit) {
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/* no need to acquire qpair lock. It's just rough calculation */
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iocbs_used = ha->base_qpair->fwres.iocbs_used;
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for (i = 0; i < ha->max_qpairs; i++) {
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if (ha->queue_pair_map[i])
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iocbs_used += ha->queue_pair_map[i]->fwres.iocbs_used;
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}
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if ((iores->iocb_cnt + iocbs_used) >= qp->fwres.iocbs_limit) {
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iores->res_type = RESOURCE_NONE;
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return -ENOSPC;
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}
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}
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if (iores->res_type & RESOURCE_EXCH) {
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exch_used = ha->base_qpair->fwres.exch_used;
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for (i = 0; i < ha->max_qpairs; i++) {
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if (ha->queue_pair_map[i])
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exch_used += ha->queue_pair_map[i]->fwres.exch_used;
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}
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if ((exch_used + iores->exch_cnt) >= qp->fwres.exch_limit) {
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iores->res_type = RESOURCE_NONE;
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return -ENOSPC;
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}
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}
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if (ql2xenforce_iocb_limit == 2) {
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if ((iores->iocb_cnt + atomic_read(&ha->fwres.iocb_used)) >=
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ha->fwres.iocb_limit) {
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iores->res_type = RESOURCE_NONE;
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return -ENOSPC;
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}
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if (iores->res_type & RESOURCE_EXCH) {
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if ((iores->exch_cnt + atomic_read(&ha->fwres.exch_used)) >=
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ha->fwres.exch_limit) {
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iores->res_type = RESOURCE_NONE;
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return -ENOSPC;
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}
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}
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}
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force:
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qp->fwres.iocbs_used += iores->iocb_cnt;
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qp->fwres.exch_used += iores->exch_cnt;
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if (ql2xenforce_iocb_limit == 2) {
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atomic_add(iores->iocb_cnt, &ha->fwres.iocb_used);
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atomic_add(iores->exch_cnt, &ha->fwres.exch_used);
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iores->res_type |= RESOURCE_HA;
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}
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return 0;
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}
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/*
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* decrement to zero. This routine will not decrement below zero
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* @v: pointer of type atomic_t
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* @amount: amount to decrement from v
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|
*/
|
|
static void qla_atomic_dtz(atomic_t *v, int amount)
|
|
{
|
|
int c, old, dec;
|
|
|
|
c = atomic_read(v);
|
|
for (;;) {
|
|
dec = c - amount;
|
|
if (unlikely(dec < 0))
|
|
dec = 0;
|
|
|
|
old = atomic_cmpxchg((v), c, dec);
|
|
if (likely(old == c))
|
|
break;
|
|
c = old;
|
|
}
|
|
}
|
|
|
|
static inline void
|
|
qla_put_fw_resources(struct qla_qpair *qp, struct iocb_resource *iores)
|
|
{
|
|
struct qla_hw_data *ha = qp->hw;
|
|
|
|
if (iores->res_type & RESOURCE_HA) {
|
|
if (iores->res_type & RESOURCE_IOCB)
|
|
qla_atomic_dtz(&ha->fwres.iocb_used, iores->iocb_cnt);
|
|
|
|
if (iores->res_type & RESOURCE_EXCH)
|
|
qla_atomic_dtz(&ha->fwres.exch_used, iores->exch_cnt);
|
|
}
|
|
|
|
if (iores->res_type & RESOURCE_IOCB) {
|
|
if (qp->fwres.iocbs_used >= iores->iocb_cnt) {
|
|
qp->fwres.iocbs_used -= iores->iocb_cnt;
|
|
} else {
|
|
/* should not happen */
|
|
qp->fwres.iocbs_used = 0;
|
|
}
|
|
}
|
|
|
|
if (iores->res_type & RESOURCE_EXCH) {
|
|
if (qp->fwres.exch_used >= iores->exch_cnt) {
|
|
qp->fwres.exch_used -= iores->exch_cnt;
|
|
} else {
|
|
/* should not happen */
|
|
qp->fwres.exch_used = 0;
|
|
}
|
|
}
|
|
iores->res_type = RESOURCE_NONE;
|
|
}
|
|
|
|
#define ISP_REG_DISCONNECT 0xffffffffU
|
|
/**************************************************************************
|
|
* qla2x00_isp_reg_stat
|
|
*
|
|
* Description:
|
|
* Read the host status register of ISP before aborting the command.
|
|
*
|
|
* Input:
|
|
* ha = pointer to host adapter structure.
|
|
*
|
|
*
|
|
* Returns:
|
|
* Either true or false.
|
|
*
|
|
* Note: Return true if there is register disconnect.
|
|
**************************************************************************/
|
|
static inline
|
|
uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
|
|
{
|
|
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
|
|
struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
|
|
|
|
if (IS_P3P_TYPE(ha))
|
|
return ((rd_reg_dword(®82->host_int)) == ISP_REG_DISCONNECT);
|
|
else
|
|
return ((rd_reg_dword(®->host_status)) ==
|
|
ISP_REG_DISCONNECT);
|
|
}
|
|
|
|
static inline
|
|
bool qla_pci_disconnected(struct scsi_qla_host *vha,
|
|
struct device_reg_24xx __iomem *reg)
|
|
{
|
|
uint32_t stat;
|
|
bool ret = false;
|
|
|
|
stat = rd_reg_dword(®->host_status);
|
|
if (stat == 0xffffffff) {
|
|
ql_log(ql_log_info, vha, 0x8041,
|
|
"detected PCI disconnect.\n");
|
|
qla_schedule_eeh_work(vha);
|
|
ret = true;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static inline bool
|
|
fcport_is_smaller(fc_port_t *fcport)
|
|
{
|
|
if (wwn_to_u64(fcport->port_name) <
|
|
wwn_to_u64(fcport->vha->port_name))
|
|
return true;
|
|
else
|
|
return false;
|
|
}
|
|
|
|
static inline bool
|
|
fcport_is_bigger(fc_port_t *fcport)
|
|
{
|
|
return !fcport_is_smaller(fcport);
|
|
}
|
|
|
|
static inline struct qla_qpair *
|
|
qla_mapq_nvme_select_qpair(struct qla_hw_data *ha, struct qla_qpair *qpair)
|
|
{
|
|
int cpuid = raw_smp_processor_id();
|
|
|
|
if (qpair->cpuid != cpuid &&
|
|
ha->qp_cpu_map[cpuid]) {
|
|
qpair = ha->qp_cpu_map[cpuid];
|
|
}
|
|
return qpair;
|
|
}
|
|
|
|
static inline void
|
|
qla_mapq_init_qp_cpu_map(struct qla_hw_data *ha,
|
|
struct qla_msix_entry *msix,
|
|
struct qla_qpair *qpair)
|
|
{
|
|
const struct cpumask *mask;
|
|
unsigned int cpu;
|
|
|
|
if (!ha->qp_cpu_map)
|
|
return;
|
|
mask = pci_irq_get_affinity(ha->pdev, msix->vector_base0);
|
|
if (!mask)
|
|
return;
|
|
qpair->cpuid = cpumask_first(mask);
|
|
for_each_cpu(cpu, mask) {
|
|
ha->qp_cpu_map[cpu] = qpair;
|
|
}
|
|
msix->cpuid = qpair->cpuid;
|
|
qpair->cpu_mapped = true;
|
|
}
|
|
|
|
static inline void
|
|
qla_mapq_free_qp_cpu_map(struct qla_hw_data *ha)
|
|
{
|
|
if (ha->qp_cpu_map) {
|
|
kfree(ha->qp_cpu_map);
|
|
ha->qp_cpu_map = NULL;
|
|
}
|
|
}
|
|
|
|
static inline int qla_mapq_alloc_qp_cpu_map(struct qla_hw_data *ha)
|
|
{
|
|
scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
|
|
|
|
if (!ha->qp_cpu_map) {
|
|
ha->qp_cpu_map = kcalloc(NR_CPUS, sizeof(struct qla_qpair *),
|
|
GFP_KERNEL);
|
|
if (!ha->qp_cpu_map) {
|
|
ql_log(ql_log_fatal, vha, 0x0180,
|
|
"Unable to allocate memory for qp_cpu_map ptrs.\n");
|
|
return -1;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static inline bool val_is_in_range(u32 val, u32 start, u32 end)
|
|
{
|
|
if (val >= start && val <= end)
|
|
return true;
|
|
else
|
|
return false;
|
|
}
|