e1ff91f9d2
The External Interrupt Controller (EINTC) on all of the supported MediaTek SoCs does support input debouncing, but not all of them index the debounce time values (DBNC_SETTING registers) the same way. Before this change, in some cases, as an example, requesting a debounce time of 16 milliseconds would mistakenly set the relative DBNC_SETTING register to 0x2, resulting in a way shorter debounce time of 500uS. To fix the aforementioned issue, define three different debounce_time arrays, reflecting the correct register index for each value and for each register index variant, and make sure that each SoC pinctrl driver uses the right one. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221111094106.18486-1-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
113 lines
2.5 KiB
C
113 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2014-2018 MediaTek Inc.
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*
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* Author: Maoguang Meng <maoguang.meng@mediatek.com>
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* Sean Wang <sean.wang@mediatek.com>
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*
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*/
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#ifndef __MTK_EINT_H
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#define __MTK_EINT_H
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#include <linux/irqdomain.h>
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struct mtk_eint_regs {
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unsigned int stat;
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unsigned int ack;
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unsigned int mask;
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unsigned int mask_set;
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unsigned int mask_clr;
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unsigned int sens;
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unsigned int sens_set;
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unsigned int sens_clr;
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unsigned int soft;
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unsigned int soft_set;
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unsigned int soft_clr;
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unsigned int pol;
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unsigned int pol_set;
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unsigned int pol_clr;
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unsigned int dom_en;
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unsigned int dbnc_ctrl;
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unsigned int dbnc_set;
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unsigned int dbnc_clr;
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};
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struct mtk_eint_hw {
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u8 port_mask;
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u8 ports;
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unsigned int ap_num;
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unsigned int db_cnt;
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const unsigned int *db_time;
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};
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extern const unsigned int debounce_time_mt2701[];
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extern const unsigned int debounce_time_mt6765[];
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extern const unsigned int debounce_time_mt6795[];
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struct mtk_eint;
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struct mtk_eint_xt {
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int (*get_gpio_n)(void *data, unsigned long eint_n,
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unsigned int *gpio_n,
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struct gpio_chip **gpio_chip);
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int (*get_gpio_state)(void *data, unsigned long eint_n);
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int (*set_gpio_as_eint)(void *data, unsigned long eint_n);
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};
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struct mtk_eint {
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struct device *dev;
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void __iomem *base;
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struct irq_domain *domain;
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int irq;
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int *dual_edge;
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u32 *wake_mask;
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u32 *cur_mask;
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/* Used to fit into various EINT device */
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const struct mtk_eint_hw *hw;
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const struct mtk_eint_regs *regs;
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u16 num_db_time;
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/* Used to fit into various pinctrl device */
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void *pctl;
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const struct mtk_eint_xt *gpio_xlate;
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};
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#if IS_ENABLED(CONFIG_EINT_MTK)
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int mtk_eint_do_init(struct mtk_eint *eint);
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int mtk_eint_do_suspend(struct mtk_eint *eint);
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int mtk_eint_do_resume(struct mtk_eint *eint);
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int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n,
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unsigned int debounce);
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int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n);
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#else
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static inline int mtk_eint_do_init(struct mtk_eint *eint)
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{
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return -EOPNOTSUPP;
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}
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static inline int mtk_eint_do_suspend(struct mtk_eint *eint)
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{
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return -EOPNOTSUPP;
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}
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static inline int mtk_eint_do_resume(struct mtk_eint *eint)
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{
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return -EOPNOTSUPP;
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}
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static inline int mtk_eint_set_debounce(struct mtk_eint *eint, unsigned long eint_n,
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unsigned int debounce)
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{
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return -EOPNOTSUPP;
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}
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static inline int mtk_eint_find_irq(struct mtk_eint *eint, unsigned long eint_n)
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{
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return -EOPNOTSUPP;
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}
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#endif
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#endif /* __MTK_EINT_H */
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