7559e7572c
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
166 lines
3.9 KiB
C
166 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2015 Linaro Ltd.
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* Copyright (c) 2015 HiSilicon Limited.
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*/
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#include <linux/mfd/syscon.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/regmap.h>
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#define SC_PERIPH_CTRL4 0x00c
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#define CTRL4_PICO_SIDDQ BIT(6)
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#define CTRL4_PICO_OGDISABLE BIT(8)
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#define CTRL4_PICO_VBUSVLDEXT BIT(10)
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#define CTRL4_PICO_VBUSVLDEXTSEL BIT(11)
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#define CTRL4_OTG_PHY_SEL BIT(21)
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#define SC_PERIPH_CTRL5 0x010
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#define CTRL5_USBOTG_RES_SEL BIT(3)
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#define CTRL5_PICOPHY_ACAENB BIT(4)
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#define CTRL5_PICOPHY_BC_MODE BIT(5)
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#define CTRL5_PICOPHY_CHRGSEL BIT(6)
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#define CTRL5_PICOPHY_VDATSRCEND BIT(7)
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#define CTRL5_PICOPHY_VDATDETENB BIT(8)
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#define CTRL5_PICOPHY_DCDENB BIT(9)
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#define CTRL5_PICOPHY_IDDIG BIT(10)
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#define SC_PERIPH_CTRL8 0x018
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#define SC_PERIPH_RSTEN0 0x300
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#define SC_PERIPH_RSTDIS0 0x304
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#define RST0_USBOTG_BUS BIT(4)
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#define RST0_POR_PICOPHY BIT(5)
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#define RST0_USBOTG BIT(6)
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#define RST0_USBOTG_32K BIT(7)
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#define EYE_PATTERN_PARA 0x7053348c
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struct hi6220_priv {
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struct regmap *reg;
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struct device *dev;
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};
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static void hi6220_phy_init(struct hi6220_priv *priv)
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{
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struct regmap *reg = priv->reg;
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u32 val, mask;
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val = RST0_USBOTG_BUS | RST0_POR_PICOPHY |
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RST0_USBOTG | RST0_USBOTG_32K;
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mask = val;
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regmap_update_bits(reg, SC_PERIPH_RSTEN0, mask, val);
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regmap_update_bits(reg, SC_PERIPH_RSTDIS0, mask, val);
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}
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static int hi6220_phy_setup(struct hi6220_priv *priv, bool on)
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{
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struct regmap *reg = priv->reg;
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u32 val, mask;
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int ret;
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if (on) {
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val = CTRL5_USBOTG_RES_SEL | CTRL5_PICOPHY_ACAENB;
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mask = val | CTRL5_PICOPHY_BC_MODE;
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ret = regmap_update_bits(reg, SC_PERIPH_CTRL5, mask, val);
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if (ret)
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goto out;
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val = CTRL4_PICO_VBUSVLDEXT | CTRL4_PICO_VBUSVLDEXTSEL |
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CTRL4_OTG_PHY_SEL;
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mask = val | CTRL4_PICO_SIDDQ | CTRL4_PICO_OGDISABLE;
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ret = regmap_update_bits(reg, SC_PERIPH_CTRL4, mask, val);
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if (ret)
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goto out;
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ret = regmap_write(reg, SC_PERIPH_CTRL8, EYE_PATTERN_PARA);
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if (ret)
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goto out;
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} else {
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val = CTRL4_PICO_SIDDQ;
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mask = val;
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ret = regmap_update_bits(reg, SC_PERIPH_CTRL4, mask, val);
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if (ret)
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goto out;
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}
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return 0;
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out:
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dev_err(priv->dev, "failed to setup phy ret: %d\n", ret);
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return ret;
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}
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static int hi6220_phy_start(struct phy *phy)
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{
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struct hi6220_priv *priv = phy_get_drvdata(phy);
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return hi6220_phy_setup(priv, true);
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}
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static int hi6220_phy_exit(struct phy *phy)
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{
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struct hi6220_priv *priv = phy_get_drvdata(phy);
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return hi6220_phy_setup(priv, false);
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}
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static const struct phy_ops hi6220_phy_ops = {
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.init = hi6220_phy_start,
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.exit = hi6220_phy_exit,
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.owner = THIS_MODULE,
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};
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static int hi6220_phy_probe(struct platform_device *pdev)
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{
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struct phy_provider *phy_provider;
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struct device *dev = &pdev->dev;
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struct phy *phy;
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struct hi6220_priv *priv;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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priv->reg = syscon_regmap_lookup_by_phandle(dev->of_node,
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"hisilicon,peripheral-syscon");
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if (IS_ERR(priv->reg)) {
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dev_err(dev, "no hisilicon,peripheral-syscon\n");
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return PTR_ERR(priv->reg);
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}
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hi6220_phy_init(priv);
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phy = devm_phy_create(dev, NULL, &hi6220_phy_ops);
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if (IS_ERR(phy))
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return PTR_ERR(phy);
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phy_set_drvdata(phy, priv);
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static const struct of_device_id hi6220_phy_of_match[] = {
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{.compatible = "hisilicon,hi6220-usb-phy",},
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{ },
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};
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MODULE_DEVICE_TABLE(of, hi6220_phy_of_match);
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static struct platform_driver hi6220_phy_driver = {
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.probe = hi6220_phy_probe,
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.driver = {
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.name = "hi6220-usb-phy",
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.of_match_table = hi6220_phy_of_match,
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}
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};
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module_platform_driver(hi6220_phy_driver);
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MODULE_DESCRIPTION("HISILICON HI6220 USB PHY driver");
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MODULE_ALIAS("platform:hi6220-usb-phy");
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MODULE_LICENSE("GPL");
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