ba2274dcfd
At this moment with the current status, t7xx is not functional due to
problems like this after connection, if there is no activity:
[ 57.370534] mtk_t7xx 0000:72:00.0: [PM] SAP suspend error: -110
[ 57.370581] mtk_t7xx 0000:72:00.0: can't suspend
(t7xx_pci_pm_runtime_suspend [mtk_t7xx] returned -110)
because after this, the traffic no longer works.
The complete series 'net: wwan: t7xx: fw flashing & coredump support'
was reverted because of issues with the pci implementation.
In order to have at least the modem working, it would be enough if just
the first commit of the series is re-applied:
d20ef656f9 net: wwan: t7xx: Add AP CLDMA
With that, the Application Processor would be controlled, correctly
suspended and the commented problems would be fixed (I am testing here
like this with no related issue).
This commit is independent of the others and not related to the
commented pci implementation for the new features: fw flashing and
coredump collection.
Use v2 patch version of d20ef656f9 as JinJian Song suggests
(https://patchwork.kernel.org/project/netdevbpf/patch/20230105154215.198828-1-m.chetan.kumar@linux.intel.com/).
Original text from the commit that would be re-applied:
d20ef656f9 net: wwan: t7xx: Add AP CLDMA
Author: Haijun Liu <haijun.liu@mediatek.com>
Date: Tue Aug 16 09:53:28 2022 +0530
The t7xx device contains two Cross Layer DMA (CLDMA) interfaces to
communicate with AP and Modem processors respectively. So far only
MD-CLDMA was being used, this patch enables AP-CLDMA.
Rename small Application Processor (sAP) to AP.
Signed-off-by: Haijun Liu <haijun.liu@mediatek.com>
Co-developed-by: Madhusmita Sahu <madhusmita.sahu@intel.com>
Signed-off-by: Madhusmita Sahu <madhusmita.sahu@intel.com>
Signed-off-by: Moises Veleta <moises.veleta@linux.intel.com>
Signed-off-by: Devegowda Chandrashekar <chandrashekar.devegowda@intel.com>
Signed-off-by: M Chetan Kumar <m.chetan.kumar@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Jose Ignacio Tornos Martinez <jtornosm@redhat.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Link: https://lore.kernel.org/r/20230711062817.6108-1-jtornosm@redhat.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
39 lines
1.1 KiB
C
39 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only
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*
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* Copyright (c) 2021, MediaTek Inc.
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* Copyright (c) 2021-2022, Intel Corporation.
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*
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* Authors:
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* Haijun Liu <haijun.liu@mediatek.com>
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* Sreehari Kancharla <sreehari.kancharla@intel.com>
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*
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* Contributors:
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* Amir Hanania <amir.hanania@intel.com>
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* Ricardo Martinez <ricardo.martinez@linux.intel.com>
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*/
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#ifndef __T7XX_MHCCIF_H__
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#define __T7XX_MHCCIF_H__
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#include <linux/types.h>
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#include "t7xx_pci.h"
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#include "t7xx_reg.h"
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#define D2H_SW_INT_MASK (D2H_INT_EXCEPTION_INIT | \
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D2H_INT_EXCEPTION_INIT_DONE | \
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D2H_INT_EXCEPTION_CLEARQ_DONE | \
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D2H_INT_EXCEPTION_ALLQ_RESET | \
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D2H_INT_PORT_ENUM | \
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D2H_INT_ASYNC_AP_HK | \
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D2H_INT_ASYNC_MD_HK)
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void t7xx_mhccif_mask_set(struct t7xx_pci_dev *t7xx_dev, u32 val);
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void t7xx_mhccif_mask_clr(struct t7xx_pci_dev *t7xx_dev, u32 val);
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u32 t7xx_mhccif_mask_get(struct t7xx_pci_dev *t7xx_dev);
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void t7xx_mhccif_init(struct t7xx_pci_dev *t7xx_dev);
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u32 t7xx_mhccif_read_sw_int_sts(struct t7xx_pci_dev *t7xx_dev);
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void t7xx_mhccif_h2d_swint_trigger(struct t7xx_pci_dev *t7xx_dev, u32 channel);
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#endif /*__T7XX_MHCCIF_H__ */
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