361beddbfb
No need cast (void*) to (struct rsi_91x_sdiodev *). Signed-off-by: Wu Yunchuan <yunchuan@nfschina.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230803073550.3666829-1-yunchuan@nfschina.com
416 lines
10 KiB
C
416 lines
10 KiB
C
/*
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* Copyright (c) 2014 Redpine Signals Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/firmware.h>
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#include <net/rsi_91x.h>
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#include "rsi_sdio.h"
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#include "rsi_common.h"
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/**
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* rsi_sdio_master_access_msword() - This function sets the AHB master access
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* MS word in the SDIO slave registers.
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* @adapter: Pointer to the adapter structure.
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* @ms_word: ms word need to be initialized.
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*
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* Return: status: 0 on success, -1 on failure.
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*/
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int rsi_sdio_master_access_msword(struct rsi_hw *adapter, u16 ms_word)
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{
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u8 byte;
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u8 function = 0;
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int status = 0;
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byte = (u8)(ms_word & 0x00FF);
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rsi_dbg(INIT_ZONE,
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"%s: MASTER_ACCESS_MSBYTE:0x%x\n", __func__, byte);
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_MASTER_ACCESS_MSBYTE,
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&byte);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: fail to access MASTER_ACCESS_MSBYTE\n",
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__func__);
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return -1;
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}
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byte = (u8)(ms_word >> 8);
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rsi_dbg(INIT_ZONE, "%s:MASTER_ACCESS_LSBYTE:0x%x\n", __func__, byte);
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_MASTER_ACCESS_LSBYTE,
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&byte);
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return status;
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}
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static void rsi_rx_handler(struct rsi_hw *adapter);
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void rsi_sdio_rx_thread(struct rsi_common *common)
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{
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struct rsi_hw *adapter = common->priv;
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struct rsi_91x_sdiodev *sdev = adapter->rsi_dev;
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do {
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rsi_wait_event(&sdev->rx_thread.event, EVENT_WAIT_FOREVER);
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rsi_reset_event(&sdev->rx_thread.event);
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rsi_rx_handler(adapter);
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} while (!atomic_read(&sdev->rx_thread.thread_done));
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rsi_dbg(INFO_ZONE, "%s: Terminated SDIO RX thread\n", __func__);
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atomic_inc(&sdev->rx_thread.thread_done);
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kthread_complete_and_exit(&sdev->rx_thread.completion, 0);
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}
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/**
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* rsi_process_pkt() - This Function reads rx_blocks register and figures out
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* the size of the rx pkt.
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* @common: Pointer to the driver private structure.
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*
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* Return: 0 on success, -1 on failure.
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*/
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static int rsi_process_pkt(struct rsi_common *common)
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{
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struct rsi_hw *adapter = common->priv;
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struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
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u8 num_blks = 0;
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u32 rcv_pkt_len = 0;
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int status = 0;
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u8 value = 0;
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num_blks = ((adapter->interrupt_status & 1) |
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((adapter->interrupt_status >> RECV_NUM_BLOCKS) << 1));
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if (!num_blks) {
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status = rsi_sdio_read_register(adapter,
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SDIO_RX_NUM_BLOCKS_REG,
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&value);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to read pkt length from the card:\n",
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__func__);
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return status;
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}
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num_blks = value & 0x1f;
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}
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if (dev->write_fail == 2)
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rsi_sdio_ack_intr(common->priv, (1 << MSDU_PKT_PENDING));
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if (unlikely(!num_blks)) {
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dev->write_fail = 2;
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return -1;
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}
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rcv_pkt_len = (num_blks * 256);
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status = rsi_sdio_host_intf_read_pkt(adapter, dev->pktbuffer,
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rcv_pkt_len);
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if (status) {
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rsi_dbg(ERR_ZONE, "%s: Failed to read packet from card\n",
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__func__);
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return status;
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}
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status = rsi_read_pkt(common, dev->pktbuffer, rcv_pkt_len);
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if (status) {
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rsi_dbg(ERR_ZONE, "Failed to read the packet\n");
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return status;
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}
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return 0;
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}
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/**
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* rsi_init_sdio_slave_regs() - This function does the actual initialization
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* of SDBUS slave registers.
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* @adapter: Pointer to the adapter structure.
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*
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* Return: status: 0 on success, -1 on failure.
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*/
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int rsi_init_sdio_slave_regs(struct rsi_hw *adapter)
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{
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struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
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u8 function = 0;
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u8 byte;
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int status = 0;
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if (dev->next_read_delay) {
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byte = dev->next_read_delay;
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_NXT_RD_DELAY2,
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&byte);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to write SDIO_NXT_RD_DELAY2\n",
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__func__);
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return -1;
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}
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}
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if (dev->sdio_high_speed_enable) {
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rsi_dbg(INIT_ZONE, "%s: Enabling SDIO High speed\n", __func__);
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byte = 0x3;
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_REG_HIGH_SPEED,
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&byte);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to enable SDIO high speed\n",
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__func__);
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return -1;
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}
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}
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/* This tells SDIO FIFO when to start read to host */
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rsi_dbg(INIT_ZONE, "%s: Initializing SDIO read start level\n", __func__);
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byte = 0x24;
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_READ_START_LVL,
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&byte);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to write SDIO_READ_START_LVL\n", __func__);
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return -1;
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}
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rsi_dbg(INIT_ZONE, "%s: Initializing FIFO ctrl registers\n", __func__);
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byte = (128 - 32);
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_READ_FIFO_CTL,
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&byte);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to write SDIO_READ_FIFO_CTL\n", __func__);
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return -1;
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}
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byte = 32;
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status = rsi_sdio_write_register(adapter,
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function,
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SDIO_WRITE_FIFO_CTL,
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&byte);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to write SDIO_WRITE_FIFO_CTL\n", __func__);
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return -1;
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}
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return 0;
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}
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/**
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* rsi_rx_handler() - Read and process SDIO interrupts.
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* @adapter: Pointer to the adapter structure.
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*
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* Return: None.
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*/
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static void rsi_rx_handler(struct rsi_hw *adapter)
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{
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struct rsi_common *common = adapter->priv;
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struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
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int status;
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u8 isr_status = 0;
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u8 fw_status = 0;
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dev->rx_info.sdio_int_counter++;
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do {
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mutex_lock(&common->rx_lock);
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status = rsi_sdio_read_register(common->priv,
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RSI_FN1_INT_REGISTER,
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&isr_status);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to Read Intr Status Register\n",
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__func__);
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mutex_unlock(&common->rx_lock);
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return;
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}
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adapter->interrupt_status = isr_status;
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if (isr_status == 0) {
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rsi_set_event(&common->tx_thread.event);
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dev->rx_info.sdio_intr_status_zero++;
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mutex_unlock(&common->rx_lock);
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return;
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}
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rsi_dbg(ISR_ZONE, "%s: Intr_status = %x %d %d\n",
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__func__, isr_status, (1 << MSDU_PKT_PENDING),
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(1 << FW_ASSERT_IND));
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if (isr_status & BIT(PKT_BUFF_AVAILABLE)) {
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status = rsi_sdio_check_buffer_status(adapter, 0);
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if (status < 0)
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rsi_dbg(ERR_ZONE,
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"%s: Failed to check buffer status\n",
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__func__);
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rsi_sdio_ack_intr(common->priv,
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BIT(PKT_BUFF_AVAILABLE));
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rsi_set_event(&common->tx_thread.event);
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rsi_dbg(ISR_ZONE, "%s: ==> BUFFER_AVAILABLE <==\n",
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__func__);
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dev->buff_status_updated = true;
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isr_status &= ~BIT(PKT_BUFF_AVAILABLE);
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}
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if (isr_status & BIT(FW_ASSERT_IND)) {
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rsi_dbg(ERR_ZONE, "%s: ==> FIRMWARE Assert <==\n",
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__func__);
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status = rsi_sdio_read_register(common->priv,
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SDIO_FW_STATUS_REG,
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&fw_status);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to read f/w reg\n",
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__func__);
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} else {
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rsi_dbg(ERR_ZONE,
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"%s: Firmware Status is 0x%x\n",
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__func__, fw_status);
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rsi_sdio_ack_intr(common->priv,
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BIT(FW_ASSERT_IND));
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}
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common->fsm_state = FSM_CARD_NOT_READY;
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isr_status &= ~BIT(FW_ASSERT_IND);
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}
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if (isr_status & BIT(MSDU_PKT_PENDING)) {
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rsi_dbg(ISR_ZONE, "Pkt pending interrupt\n");
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dev->rx_info.total_sdio_msdu_pending_intr++;
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status = rsi_process_pkt(common);
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if (status) {
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rsi_dbg(ERR_ZONE, "%s: Failed to read pkt\n",
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__func__);
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mutex_unlock(&common->rx_lock);
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return;
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}
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isr_status &= ~BIT(MSDU_PKT_PENDING);
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}
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if (isr_status) {
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rsi_sdio_ack_intr(common->priv, isr_status);
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dev->rx_info.total_sdio_unknown_intr++;
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isr_status = 0;
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rsi_dbg(ISR_ZONE, "Unknown Interrupt %x\n",
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isr_status);
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}
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mutex_unlock(&common->rx_lock);
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} while (1);
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}
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/* This function is used to read buffer status register and
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* set relevant fields in rsi_91x_sdiodev struct.
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*/
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int rsi_sdio_check_buffer_status(struct rsi_hw *adapter, u8 q_num)
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{
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struct rsi_common *common = adapter->priv;
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struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
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u8 buf_status = 0;
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int status = 0;
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static int counter = 4;
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if (!dev->buff_status_updated && counter) {
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counter--;
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goto out;
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}
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dev->buff_status_updated = false;
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status = rsi_sdio_read_register(common->priv,
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RSI_DEVICE_BUFFER_STATUS_REGISTER,
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&buf_status);
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if (status) {
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rsi_dbg(ERR_ZONE,
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"%s: Failed to read status register\n", __func__);
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return -1;
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}
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if (buf_status & (BIT(PKT_MGMT_BUFF_FULL))) {
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if (!dev->rx_info.mgmt_buffer_full)
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dev->rx_info.mgmt_buf_full_counter++;
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dev->rx_info.mgmt_buffer_full = true;
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} else {
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dev->rx_info.mgmt_buffer_full = false;
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}
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if (buf_status & (BIT(PKT_BUFF_FULL))) {
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if (!dev->rx_info.buffer_full)
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dev->rx_info.buf_full_counter++;
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dev->rx_info.buffer_full = true;
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} else {
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dev->rx_info.buffer_full = false;
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}
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if (buf_status & (BIT(PKT_BUFF_SEMI_FULL))) {
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if (!dev->rx_info.semi_buffer_full)
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dev->rx_info.buf_semi_full_counter++;
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dev->rx_info.semi_buffer_full = true;
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} else {
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dev->rx_info.semi_buffer_full = false;
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}
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if (dev->rx_info.mgmt_buffer_full || dev->rx_info.buf_full_counter)
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counter = 1;
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else
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counter = 4;
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out:
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if ((q_num == MGMT_SOFT_Q) && (dev->rx_info.mgmt_buffer_full))
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return QUEUE_FULL;
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if ((q_num < MGMT_SOFT_Q) && (dev->rx_info.buffer_full))
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return QUEUE_FULL;
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return QUEUE_NOT_FULL;
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}
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/**
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* rsi_sdio_determine_event_timeout() - This Function determines the event
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* timeout duration.
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* @adapter: Pointer to the adapter structure.
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*
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* Return: timeout duration is returned.
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*/
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int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter)
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{
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struct rsi_91x_sdiodev *dev = adapter->rsi_dev;
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/* Once buffer full is seen, event timeout to occur every 2 msecs */
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if (dev->rx_info.buffer_full)
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return 2;
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return EVENT_WAIT_FOREVER;
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}
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