c9ac071e30
To get more accurate RSSI, this commit includes frequency domain RSSI info in RSSI calculation. Add correspond physts parsing and macro to get frequency domain RSSI information for supported IC. Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20240828055217.10263-3-pkshih@realtek.com
401 lines
10 KiB
C
401 lines
10 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/* Copyright(c) 2024 Realtek Corporation
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*/
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#ifndef __RTW89_8852BX_H__
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#define __RTW89_8852BX_H__
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#include "core.h"
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#define RF_PATH_NUM_8852BX 2
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#define BB_PATH_NUM_8852BX 2
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enum rtw8852bx_pmac_mode {
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NONE_TEST,
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PKTS_TX,
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PKTS_RX,
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CONT_TX
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};
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struct rtw8852bx_u_efuse {
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u8 rsvd[0x88];
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u8 mac_addr[ETH_ALEN];
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};
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struct rtw8852bx_e_efuse {
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u8 mac_addr[ETH_ALEN];
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};
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struct rtw8852bx_tssi_offset {
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u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM];
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u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM];
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u8 rsvd[7];
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u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM];
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} __packed;
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struct rtw8852bx_efuse {
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u8 rsvd[0x210];
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struct rtw8852bx_tssi_offset path_a_tssi;
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u8 rsvd1[10];
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struct rtw8852bx_tssi_offset path_b_tssi;
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u8 rsvd2[94];
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u8 channel_plan;
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u8 xtal_k;
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u8 rsvd3;
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u8 iqk_lck;
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u8 rsvd4[5];
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u8 reg_setting:2;
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u8 tx_diversity:1;
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u8 rx_diversity:2;
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u8 ac_mode:1;
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u8 module_type:2;
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u8 rsvd5;
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u8 shared_ant:1;
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u8 coex_type:3;
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u8 ant_iso:1;
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u8 radio_on_off:1;
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u8 rsvd6:2;
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u8 eeprom_version;
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u8 customer_id;
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u8 tx_bb_swing_2g;
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u8 tx_bb_swing_5g;
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u8 tx_cali_pwr_trk_mode;
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u8 trx_path_selection;
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u8 rfe_type;
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u8 country_code[2];
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u8 rsvd7[3];
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u8 path_a_therm;
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u8 path_b_therm;
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u8 rsvd8[2];
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u8 rx_gain_2g_ofdm;
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u8 rsvd9;
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u8 rx_gain_2g_cck;
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u8 rsvd10;
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u8 rx_gain_5g_low;
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u8 rsvd11;
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u8 rx_gain_5g_mid;
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u8 rsvd12;
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u8 rx_gain_5g_high;
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u8 rsvd13[35];
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u8 path_a_cck_pwr_idx[6];
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u8 path_a_bw40_1tx_pwr_idx[5];
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u8 path_a_ofdm_1tx_pwr_idx_diff:4;
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u8 path_a_bw20_1tx_pwr_idx_diff:4;
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u8 path_a_bw20_2tx_pwr_idx_diff:4;
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u8 path_a_bw40_2tx_pwr_idx_diff:4;
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u8 path_a_cck_2tx_pwr_idx_diff:4;
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u8 path_a_ofdm_2tx_pwr_idx_diff:4;
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u8 rsvd14[0xf2];
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union {
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struct rtw8852bx_u_efuse u;
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struct rtw8852bx_e_efuse e;
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};
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} __packed;
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struct rtw8852bx_bb_pmac_info {
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u8 en_pmac_tx:1;
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u8 is_cck:1;
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u8 mode:3;
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u8 rsvd:3;
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u16 tx_cnt;
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u16 period;
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u16 tx_time;
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u8 duty_cycle;
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};
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struct rtw8852bx_bb_tssi_bak {
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u8 tx_path;
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u8 rx_path;
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u32 p0_rfmode;
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u32 p0_rfmode_ftm;
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u32 p1_rfmode;
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u32 p1_rfmode_ftm;
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s16 tx_pwr; /* S9 */
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};
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struct rtw8852bx_info {
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int (*mac_enable_bb_rf)(struct rtw89_dev *rtwdev);
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int (*mac_disable_bb_rf)(struct rtw89_dev *rtwdev);
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void (*bb_sethw)(struct rtw89_dev *rtwdev);
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void (*bb_reset_all)(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);
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void (*bb_cfg_txrx_path)(struct rtw89_dev *rtwdev);
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void (*bb_cfg_tx_path)(struct rtw89_dev *rtwdev, u8 tx_path);
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void (*bb_ctrl_rx_path)(struct rtw89_dev *rtwdev,
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enum rtw89_rf_path_bit rx_path,
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const struct rtw89_chan *chan);
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void (*bb_set_plcp_tx)(struct rtw89_dev *rtwdev);
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void (*bb_set_power)(struct rtw89_dev *rtwdev, s16 pwr_dbm,
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enum rtw89_phy_idx idx);
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void (*bb_set_pmac_pkt_tx)(struct rtw89_dev *rtwdev, u8 enable,
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u16 tx_cnt, u16 period, u16 tx_time,
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enum rtw89_phy_idx idx, const struct rtw89_chan *chan);
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void (*bb_backup_tssi)(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx,
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struct rtw8852bx_bb_tssi_bak *bak);
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void (*bb_restore_tssi)(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx,
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const struct rtw8852bx_bb_tssi_bak *bak);
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void (*bb_tx_mode_switch)(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx idx, u8 mode);
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void (*set_channel_mac)(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan, u8 mac_idx);
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void (*set_channel_bb)(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx);
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void (*ctrl_nbtg_bt_tx)(struct rtw89_dev *rtwdev, bool en,
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enum rtw89_phy_idx phy_idx);
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void (*ctrl_btg_bt_rx)(struct rtw89_dev *rtwdev, bool en,
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enum rtw89_phy_idx phy_idx);
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void (*query_ppdu)(struct rtw89_dev *rtwdev,
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struct rtw89_rx_phy_ppdu *phy_ppdu,
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struct ieee80211_rx_status *status);
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void (*convert_rpl_to_rssi)(struct rtw89_dev *rtwdev,
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struct rtw89_rx_phy_ppdu *phy_ppdu);
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int (*read_efuse)(struct rtw89_dev *rtwdev, u8 *log_map,
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enum rtw89_efuse_block block);
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int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map);
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void (*power_trim)(struct rtw89_dev *rtwdev);
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void (*set_txpwr)(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx);
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void (*set_txpwr_ctrl)(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy_idx);
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int (*init_txpwr_unit)(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);
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void (*set_txpwr_ul_tb_offset)(struct rtw89_dev *rtwdev,
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s8 pw_ofst, enum rtw89_mac_idx mac_idx);
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u8 (*get_thermal)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path);
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void (*adc_cfg)(struct rtw89_dev *rtwdev, u8 bw, u8 path);
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void (*btc_init_cfg)(struct rtw89_dev *rtwdev);
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void (*btc_set_wl_pri)(struct rtw89_dev *rtwdev, u8 map, bool state);
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s8 (*btc_get_bt_rssi)(struct rtw89_dev *rtwdev, s8 val);
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void (*btc_update_bt_cnt)(struct rtw89_dev *rtwdev);
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void (*btc_wl_s1_standby)(struct rtw89_dev *rtwdev, bool state);
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void (*btc_set_wl_rx_gain)(struct rtw89_dev *rtwdev, u32 level);
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};
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extern const struct rtw8852bx_info rtw8852bx_info;
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static inline
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int rtw8852bx_mac_enable_bb_rf(struct rtw89_dev *rtwdev)
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{
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return rtw8852bx_info.mac_enable_bb_rf(rtwdev);
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}
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static inline
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int rtw8852bx_mac_disable_bb_rf(struct rtw89_dev *rtwdev)
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{
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return rtw8852bx_info.mac_disable_bb_rf(rtwdev);
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}
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static inline
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void rtw8852bx_bb_sethw(struct rtw89_dev *rtwdev)
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{
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rtw8852bx_info.bb_sethw(rtwdev);
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}
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static inline
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void rtw8852bx_bb_reset_all(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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rtw8852bx_info.bb_reset_all(rtwdev, phy_idx);
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}
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static inline
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void rtw8852bx_bb_cfg_txrx_path(struct rtw89_dev *rtwdev)
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{
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rtw8852bx_info.bb_cfg_txrx_path(rtwdev);
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}
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static inline
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void rtw8852bx_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path)
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{
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rtw8852bx_info.bb_cfg_tx_path(rtwdev, tx_path);
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}
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static inline
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void rtw8852bx_bb_ctrl_rx_path(struct rtw89_dev *rtwdev,
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enum rtw89_rf_path_bit rx_path,
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const struct rtw89_chan *chan)
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{
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rtw8852bx_info.bb_ctrl_rx_path(rtwdev, rx_path, chan);
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}
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static inline
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void rtw8852bx_bb_set_plcp_tx(struct rtw89_dev *rtwdev)
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{
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rtw8852bx_info.bb_set_plcp_tx(rtwdev);
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}
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static inline
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void rtw8852bx_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm,
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enum rtw89_phy_idx idx)
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{
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rtw8852bx_info.bb_set_power(rtwdev, pwr_dbm, idx);
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}
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static inline
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void rtw8852bx_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable,
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u16 tx_cnt, u16 period, u16 tx_time,
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enum rtw89_phy_idx idx, const struct rtw89_chan *chan)
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{
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rtw8852bx_info.bb_set_pmac_pkt_tx(rtwdev, enable, tx_cnt, period, tx_time, idx,
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chan);
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}
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static inline
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void rtw8852bx_bb_backup_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx,
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struct rtw8852bx_bb_tssi_bak *bak)
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{
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rtw8852bx_info.bb_backup_tssi(rtwdev, idx, bak);
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}
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static inline
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void rtw8852bx_bb_restore_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx,
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const struct rtw8852bx_bb_tssi_bak *bak)
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{
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rtw8852bx_info.bb_restore_tssi(rtwdev, idx, bak);
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}
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static inline
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void rtw8852bx_bb_tx_mode_switch(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx idx, u8 mode)
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{
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rtw8852bx_info.bb_tx_mode_switch(rtwdev, idx, mode);
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}
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static inline
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void rtw8852bx_set_channel_mac(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan, u8 mac_idx)
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{
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rtw8852bx_info.set_channel_mac(rtwdev, chan, mac_idx);
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}
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static inline
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void rtw8852bx_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8852bx_info.set_channel_bb(rtwdev, chan, phy_idx);
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}
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static inline
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void rtw8852bx_ctrl_nbtg_bt_tx(struct rtw89_dev *rtwdev, bool en,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8852bx_info.ctrl_nbtg_bt_tx(rtwdev, en, phy_idx);
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}
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static inline
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void rtw8852bx_ctrl_btg_bt_rx(struct rtw89_dev *rtwdev, bool en,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8852bx_info.ctrl_btg_bt_rx(rtwdev, en, phy_idx);
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}
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static inline
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void rtw8852bx_query_ppdu(struct rtw89_dev *rtwdev,
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struct rtw89_rx_phy_ppdu *phy_ppdu,
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struct ieee80211_rx_status *status)
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{
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rtw8852bx_info.query_ppdu(rtwdev, phy_ppdu, status);
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}
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static inline
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void rtw8852bx_convert_rpl_to_rssi(struct rtw89_dev *rtwdev,
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struct rtw89_rx_phy_ppdu *phy_ppdu)
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{
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rtw8852bx_info.convert_rpl_to_rssi(rtwdev, phy_ppdu);
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}
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static inline
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int rtw8852bx_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map,
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enum rtw89_efuse_block block)
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{
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return rtw8852bx_info.read_efuse(rtwdev, log_map, block);
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}
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static inline
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int rtw8852bx_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map)
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{
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return rtw8852bx_info.read_phycap(rtwdev, phycap_map);
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}
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static inline
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void rtw8852bx_power_trim(struct rtw89_dev *rtwdev)
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{
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rtw8852bx_info.power_trim(rtwdev);
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}
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static inline
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void rtw8852bx_set_txpwr(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8852bx_info.set_txpwr(rtwdev, chan, phy_idx);
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}
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static inline
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void rtw8852bx_set_txpwr_ctrl(struct rtw89_dev *rtwdev,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8852bx_info.set_txpwr_ctrl(rtwdev, phy_idx);
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}
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static inline
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int rtw8852bx_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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return rtw8852bx_info.init_txpwr_unit(rtwdev, phy_idx);
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}
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static inline
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void rtw8852bx_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev,
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s8 pw_ofst, enum rtw89_mac_idx mac_idx)
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{
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rtw8852bx_info.set_txpwr_ul_tb_offset(rtwdev, pw_ofst, mac_idx);
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}
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static inline
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u8 rtw8852bx_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path)
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{
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return rtw8852bx_info.get_thermal(rtwdev, rf_path);
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}
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static inline
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void rtw8852bx_adc_cfg(struct rtw89_dev *rtwdev, u8 bw, u8 path)
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{
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rtw8852bx_info.adc_cfg(rtwdev, bw, path);
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}
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static inline
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void rtw8852bx_btc_init_cfg(struct rtw89_dev *rtwdev)
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{
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rtw8852bx_info.btc_init_cfg(rtwdev);
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}
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static inline
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void rtw8852bx_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state)
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{
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rtw8852bx_info.btc_set_wl_pri(rtwdev, map, state);
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}
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static inline
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s8 rtw8852bx_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val)
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{
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return rtw8852bx_info.btc_get_bt_rssi(rtwdev, val);
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}
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static inline
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void rtw8852bx_btc_update_bt_cnt(struct rtw89_dev *rtwdev)
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{
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rtw8852bx_info.btc_update_bt_cnt(rtwdev);
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}
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static inline
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void rtw8852bx_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state)
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{
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rtw8852bx_info.btc_wl_s1_standby(rtwdev, state);
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}
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static inline
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void rtw8852bx_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level)
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{
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rtw8852bx_info.btc_set_wl_rx_gain(rtwdev, level);
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}
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#endif
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