1fd4b3fe52
Modern platforms can install more than 4GB memory, so DMA address can
larger than 32 bits. If a platform doesn't enable IOMMU, kernel needs extra
works of swiotlb to help DMA that packets reside on memory over 4GB.
The DMA addressing capability of Realtek WiFi chips is 36 bits, so set
LSB 4 bits of high 32-bit address to register and TX/RX descriptor, which
below figure shows 3-level pointers in TX direction, and RX direction is
similar but 2-level pointers only.
+--------+
| | register to head of TX BD
+---|----+
| +---------+
+-----> | TX BD | (in memory)
+----|----+
| +---------+
+------> | TX WD | (in memory)
+----|----+
| +--------+
+------> | skb |
+--------+
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240611021901.26394-1-pkshih@realtek.com
96 lines
2.8 KiB
C
96 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/* Copyright(c) 2020-2021 Realtek Corporation
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include "pci.h"
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#include "reg.h"
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#include "rtw8852a.h"
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static const struct rtw89_pci_info rtw8852a_pci_info = {
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.gen_def = &rtw89_pci_gen_ax,
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.txbd_trunc_mode = MAC_AX_BD_TRUNC,
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.rxbd_trunc_mode = MAC_AX_BD_TRUNC,
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.rxbd_mode = MAC_AX_RXBD_PKT,
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.tag_mode = MAC_AX_TAG_MULTI,
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.tx_burst = MAC_AX_TX_BURST_2048B,
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.rx_burst = MAC_AX_RX_BURST_128B,
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.wd_dma_idle_intvl = MAC_AX_WD_DMA_INTVL_256NS,
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.wd_dma_act_intvl = MAC_AX_WD_DMA_INTVL_256NS,
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.multi_tag_num = MAC_AX_TAG_NUM_8,
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.lbc_en = MAC_AX_PCIE_ENABLE,
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.lbc_tmr = MAC_AX_LBC_TMR_2MS,
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.autok_en = MAC_AX_PCIE_DISABLE,
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.io_rcy_en = MAC_AX_PCIE_DISABLE,
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.io_rcy_tmr = MAC_AX_IO_RCY_ANA_TMR_6MS,
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.rx_ring_eq_is_full = false,
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.check_rx_tag = false,
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.init_cfg_reg = R_AX_PCIE_INIT_CFG1,
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.txhci_en_bit = B_AX_TXHCI_EN,
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.rxhci_en_bit = B_AX_RXHCI_EN,
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.rxbd_mode_bit = B_AX_RXBD_MODE,
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.exp_ctrl_reg = R_AX_PCIE_EXP_CTRL,
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.max_tag_num_mask = B_AX_MAX_TAG_NUM,
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.rxbd_rwptr_clr_reg = R_AX_RXBD_RWPTR_CLR,
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.txbd_rwptr_clr2_reg = R_AX_TXBD_RWPTR_CLR2,
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.dma_io_stop = {R_AX_PCIE_DMA_STOP1, B_AX_STOP_PCIEIO},
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.dma_stop1 = {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK},
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.dma_stop2 = {R_AX_PCIE_DMA_STOP2, B_AX_TX_STOP2_ALL},
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.dma_busy1 = {R_AX_PCIE_DMA_BUSY1, DMA_BUSY1_CHECK},
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.dma_busy2_reg = R_AX_PCIE_DMA_BUSY2,
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.dma_busy3_reg = R_AX_PCIE_DMA_BUSY1,
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.rpwm_addr = R_AX_PCIE_HRPWM,
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.cpwm_addr = R_AX_CPWM,
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.mit_addr = R_AX_INT_MIT_RX,
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.wp_sel_addr = 0,
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.tx_dma_ch_mask = 0,
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.bd_idx_addr_low_power = NULL,
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.dma_addr_set = &rtw89_pci_ch_dma_addr_set,
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.bd_ram_table = &rtw89_bd_ram_table_dual,
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.ltr_set = rtw89_pci_ltr_set,
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.fill_txaddr_info = rtw89_pci_fill_txaddr_info,
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.config_intr_mask = rtw89_pci_config_intr_mask,
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.enable_intr = rtw89_pci_enable_intr,
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.disable_intr = rtw89_pci_disable_intr,
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.recognize_intrs = rtw89_pci_recognize_intrs,
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};
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static const struct rtw89_driver_info rtw89_8852ae_info = {
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.chip = &rtw8852a_chip_info,
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.quirks = NULL,
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.bus = {
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.pci = &rtw8852a_pci_info,
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},
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};
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static const struct pci_device_id rtw89_8852ae_id_table[] = {
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{
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PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8852),
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.driver_data = (kernel_ulong_t)&rtw89_8852ae_info,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xa85a),
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.driver_data = (kernel_ulong_t)&rtw89_8852ae_info,
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},
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{},
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};
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MODULE_DEVICE_TABLE(pci, rtw89_8852ae_id_table);
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static struct pci_driver rtw89_8852ae_driver = {
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.name = "rtw89_8852ae",
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.id_table = rtw89_8852ae_id_table,
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.probe = rtw89_pci_probe,
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.remove = rtw89_pci_remove,
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.driver.pm = &rtw89_pm_ops,
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};
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module_pci_driver(rtw89_8852ae_driver);
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MODULE_AUTHOR("Realtek Corporation");
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MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852AE driver");
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MODULE_LICENSE("Dual BSD/GPL");
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