d73e77153b
The attributes index and entries are no longer needed, so use struct efx_buffer instead. next_buffer_table was also Siena specific. Removed some checkpatch warnings. Signed-off-by: Martin Habets <habetsm.xilinx@gmail.com> Acked-by: Edward Cree <ecree.xilinx@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
512 lines
16 KiB
C
512 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/****************************************************************************
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* Driver for Solarflare network controllers and boards
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* Copyright 2018 Solarflare Communications Inc.
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* Copyright 2019-2020 Xilinx Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <net/ip6_checksum.h>
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#include "net_driver.h"
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#include "tx_common.h"
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#include "nic_common.h"
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#include "mcdi_functions.h"
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#include "ef100_regs.h"
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#include "io.h"
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#include "ef100_tx.h"
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#include "ef100_nic.h"
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int ef100_tx_probe(struct efx_tx_queue *tx_queue)
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{
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/* Allocate an extra descriptor for the QMDA status completion entry */
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return efx_nic_alloc_buffer(tx_queue->efx, &tx_queue->txd,
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(tx_queue->ptr_mask + 2) *
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sizeof(efx_oword_t),
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GFP_KERNEL);
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}
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void ef100_tx_init(struct efx_tx_queue *tx_queue)
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{
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/* must be the inverse of lookup in efx_get_tx_channel */
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tx_queue->core_txq =
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netdev_get_tx_queue(tx_queue->efx->net_dev,
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tx_queue->channel->channel -
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tx_queue->efx->tx_channel_offset);
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/* This value is purely documentational; as EF100 never passes through
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* the switch statement in tx.c:__efx_enqueue_skb(), that switch does
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* not handle case 3. EF100's TSOv3 descriptors are generated by
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* ef100_make_tso_desc().
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* Meanwhile, all efx_mcdi_tx_init() cares about is that it's not 2.
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*/
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tx_queue->tso_version = 3;
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if (efx_mcdi_tx_init(tx_queue))
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netdev_WARN(tx_queue->efx->net_dev,
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"failed to initialise TXQ %d\n", tx_queue->queue);
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}
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static bool ef100_tx_can_tso(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
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{
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struct efx_nic *efx = tx_queue->efx;
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struct ef100_nic_data *nic_data;
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struct efx_tx_buffer *buffer;
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size_t header_len;
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u32 mss;
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nic_data = efx->nic_data;
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if (!skb_is_gso_tcp(skb))
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return false;
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if (!(efx->net_dev->features & NETIF_F_TSO))
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return false;
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mss = skb_shinfo(skb)->gso_size;
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if (unlikely(mss < 4)) {
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WARN_ONCE(1, "MSS of %u is too small for TSO\n", mss);
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return false;
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}
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header_len = efx_tx_tso_header_length(skb);
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if (header_len > nic_data->tso_max_hdr_len)
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return false;
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if (skb_shinfo(skb)->gso_segs > nic_data->tso_max_payload_num_segs) {
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/* net_dev->gso_max_segs should've caught this */
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WARN_ON_ONCE(1);
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return false;
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}
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if (skb->data_len / mss > nic_data->tso_max_frames)
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return false;
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/* net_dev->gso_max_size should've caught this */
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if (WARN_ON_ONCE(skb->data_len > nic_data->tso_max_payload_len))
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return false;
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/* Reserve an empty buffer for the TSO V3 descriptor.
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* Convey the length of the header since we already know it.
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*/
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buffer = efx_tx_queue_get_insert_buffer(tx_queue);
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buffer->flags = EFX_TX_BUF_TSO_V3 | EFX_TX_BUF_CONT;
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buffer->len = header_len;
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buffer->unmap_len = 0;
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buffer->skb = skb;
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++tx_queue->insert_count;
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return true;
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}
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static efx_oword_t *ef100_tx_desc(struct efx_tx_queue *tx_queue, unsigned int index)
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{
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if (likely(tx_queue->txd.addr))
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return ((efx_oword_t *)tx_queue->txd.addr) + index;
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else
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return NULL;
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}
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static void ef100_notify_tx_desc(struct efx_tx_queue *tx_queue)
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{
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unsigned int write_ptr;
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efx_dword_t reg;
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tx_queue->xmit_pending = false;
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if (unlikely(tx_queue->notify_count == tx_queue->write_count))
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return;
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write_ptr = tx_queue->write_count & tx_queue->ptr_mask;
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/* The write pointer goes into the high word */
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EFX_POPULATE_DWORD_1(reg, ERF_GZ_TX_RING_PIDX, write_ptr);
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efx_writed_page(tx_queue->efx, ®,
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ER_GZ_TX_RING_DOORBELL, tx_queue->queue);
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tx_queue->notify_count = tx_queue->write_count;
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}
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static void ef100_tx_push_buffers(struct efx_tx_queue *tx_queue)
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{
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ef100_notify_tx_desc(tx_queue);
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++tx_queue->pushes;
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}
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static void ef100_set_tx_csum_partial(const struct sk_buff *skb,
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struct efx_tx_buffer *buffer, efx_oword_t *txd)
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{
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efx_oword_t csum;
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int csum_start;
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if (!skb || skb->ip_summed != CHECKSUM_PARTIAL)
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return;
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/* skb->csum_start has the offset from head, but we need the offset
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* from data.
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*/
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csum_start = skb_checksum_start_offset(skb);
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EFX_POPULATE_OWORD_3(csum,
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ESF_GZ_TX_SEND_CSO_PARTIAL_EN, 1,
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ESF_GZ_TX_SEND_CSO_PARTIAL_START_W,
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csum_start >> 1,
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ESF_GZ_TX_SEND_CSO_PARTIAL_CSUM_W,
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skb->csum_offset >> 1);
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EFX_OR_OWORD(*txd, *txd, csum);
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}
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static void ef100_set_tx_hw_vlan(const struct sk_buff *skb, efx_oword_t *txd)
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{
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u16 vlan_tci = skb_vlan_tag_get(skb);
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efx_oword_t vlan;
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EFX_POPULATE_OWORD_2(vlan,
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ESF_GZ_TX_SEND_VLAN_INSERT_EN, 1,
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ESF_GZ_TX_SEND_VLAN_INSERT_TCI, vlan_tci);
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EFX_OR_OWORD(*txd, *txd, vlan);
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}
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static void ef100_make_send_desc(struct efx_nic *efx,
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const struct sk_buff *skb,
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struct efx_tx_buffer *buffer, efx_oword_t *txd,
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unsigned int segment_count)
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{
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/* TX send descriptor */
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EFX_POPULATE_OWORD_3(*txd,
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ESF_GZ_TX_SEND_NUM_SEGS, segment_count,
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ESF_GZ_TX_SEND_LEN, buffer->len,
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ESF_GZ_TX_SEND_ADDR, buffer->dma_addr);
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if (likely(efx->net_dev->features & NETIF_F_HW_CSUM))
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ef100_set_tx_csum_partial(skb, buffer, txd);
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if (efx->net_dev->features & NETIF_F_HW_VLAN_CTAG_TX &&
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skb && skb_vlan_tag_present(skb))
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ef100_set_tx_hw_vlan(skb, txd);
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}
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static void ef100_make_tso_desc(struct efx_nic *efx,
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const struct sk_buff *skb,
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struct efx_tx_buffer *buffer, efx_oword_t *txd,
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unsigned int segment_count)
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{
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bool gso_partial = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
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unsigned int len, ip_offset, tcp_offset, payload_segs;
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u32 mangleid = ESE_GZ_TX_DESC_IP4_ID_INC_MOD16;
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unsigned int outer_ip_offset, outer_l4_offset;
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u16 vlan_tci = skb_vlan_tag_get(skb);
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u32 mss = skb_shinfo(skb)->gso_size;
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bool encap = skb->encapsulation;
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bool udp_encap = false;
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u16 vlan_enable = 0;
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struct tcphdr *tcp;
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bool outer_csum;
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u32 paylen;
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if (skb_shinfo(skb)->gso_type & SKB_GSO_TCP_FIXEDID)
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mangleid = ESE_GZ_TX_DESC_IP4_ID_NO_OP;
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if (efx->net_dev->features & NETIF_F_HW_VLAN_CTAG_TX)
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vlan_enable = skb_vlan_tag_present(skb);
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len = skb->len - buffer->len;
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/* We use 1 for the TSO descriptor and 1 for the header */
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payload_segs = segment_count - 2;
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if (encap) {
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outer_ip_offset = skb_network_offset(skb);
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outer_l4_offset = skb_transport_offset(skb);
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ip_offset = skb_inner_network_offset(skb);
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tcp_offset = skb_inner_transport_offset(skb);
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if (skb_shinfo(skb)->gso_type &
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(SKB_GSO_UDP_TUNNEL | SKB_GSO_UDP_TUNNEL_CSUM))
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udp_encap = true;
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} else {
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ip_offset = skb_network_offset(skb);
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tcp_offset = skb_transport_offset(skb);
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outer_ip_offset = outer_l4_offset = 0;
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}
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outer_csum = skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM;
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/* subtract TCP payload length from inner checksum */
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tcp = (void *)skb->data + tcp_offset;
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paylen = skb->len - tcp_offset;
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csum_replace_by_diff(&tcp->check, (__force __wsum)htonl(paylen));
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EFX_POPULATE_OWORD_19(*txd,
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ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_TSO,
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ESF_GZ_TX_TSO_MSS, mss,
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ESF_GZ_TX_TSO_HDR_NUM_SEGS, 1,
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ESF_GZ_TX_TSO_PAYLOAD_NUM_SEGS, payload_segs,
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ESF_GZ_TX_TSO_HDR_LEN_W, buffer->len >> 1,
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ESF_GZ_TX_TSO_PAYLOAD_LEN, len,
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ESF_GZ_TX_TSO_CSO_OUTER_L4, outer_csum,
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ESF_GZ_TX_TSO_CSO_INNER_L4, 1,
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ESF_GZ_TX_TSO_INNER_L3_OFF_W, ip_offset >> 1,
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ESF_GZ_TX_TSO_INNER_L4_OFF_W, tcp_offset >> 1,
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ESF_GZ_TX_TSO_ED_INNER_IP4_ID, mangleid,
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ESF_GZ_TX_TSO_ED_INNER_IP_LEN, 1,
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ESF_GZ_TX_TSO_OUTER_L3_OFF_W, outer_ip_offset >> 1,
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ESF_GZ_TX_TSO_OUTER_L4_OFF_W, outer_l4_offset >> 1,
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ESF_GZ_TX_TSO_ED_OUTER_UDP_LEN, udp_encap && !gso_partial,
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ESF_GZ_TX_TSO_ED_OUTER_IP_LEN, encap && !gso_partial,
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ESF_GZ_TX_TSO_ED_OUTER_IP4_ID, encap ? mangleid :
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ESE_GZ_TX_DESC_IP4_ID_NO_OP,
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ESF_GZ_TX_TSO_VLAN_INSERT_EN, vlan_enable,
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ESF_GZ_TX_TSO_VLAN_INSERT_TCI, vlan_tci
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);
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}
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static void ef100_tx_make_descriptors(struct efx_tx_queue *tx_queue,
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const struct sk_buff *skb,
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unsigned int segment_count,
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struct efx_rep *efv)
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{
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unsigned int old_write_count = tx_queue->write_count;
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unsigned int new_write_count = old_write_count;
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struct efx_tx_buffer *buffer;
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unsigned int next_desc_type;
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unsigned int write_ptr;
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efx_oword_t *txd;
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unsigned int nr_descs = tx_queue->insert_count - old_write_count;
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if (unlikely(nr_descs == 0))
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return;
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if (segment_count)
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next_desc_type = ESE_GZ_TX_DESC_TYPE_TSO;
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else
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next_desc_type = ESE_GZ_TX_DESC_TYPE_SEND;
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if (unlikely(efv)) {
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/* Create TX override descriptor */
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write_ptr = new_write_count & tx_queue->ptr_mask;
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txd = ef100_tx_desc(tx_queue, write_ptr);
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++new_write_count;
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tx_queue->packet_write_count = new_write_count;
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EFX_POPULATE_OWORD_3(*txd,
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ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_PREFIX,
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ESF_GZ_TX_PREFIX_EGRESS_MPORT, efv->mport,
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ESF_GZ_TX_PREFIX_EGRESS_MPORT_EN, 1);
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nr_descs--;
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}
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/* if it's a raw write (such as XDP) then always SEND single frames */
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if (!skb)
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nr_descs = 1;
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do {
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write_ptr = new_write_count & tx_queue->ptr_mask;
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buffer = &tx_queue->buffer[write_ptr];
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txd = ef100_tx_desc(tx_queue, write_ptr);
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++new_write_count;
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/* Create TX descriptor ring entry */
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tx_queue->packet_write_count = new_write_count;
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switch (next_desc_type) {
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case ESE_GZ_TX_DESC_TYPE_SEND:
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ef100_make_send_desc(tx_queue->efx, skb,
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buffer, txd, nr_descs);
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break;
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case ESE_GZ_TX_DESC_TYPE_TSO:
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/* TX TSO descriptor */
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WARN_ON_ONCE(!(buffer->flags & EFX_TX_BUF_TSO_V3));
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ef100_make_tso_desc(tx_queue->efx, skb,
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buffer, txd, nr_descs);
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break;
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default:
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/* TX segment descriptor */
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EFX_POPULATE_OWORD_3(*txd,
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ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_SEG,
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ESF_GZ_TX_SEG_LEN, buffer->len,
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ESF_GZ_TX_SEG_ADDR, buffer->dma_addr);
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}
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/* if it's a raw write (such as XDP) then always SEND */
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next_desc_type = skb ? ESE_GZ_TX_DESC_TYPE_SEG :
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ESE_GZ_TX_DESC_TYPE_SEND;
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/* mark as an EFV buffer if applicable */
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if (unlikely(efv))
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buffer->flags |= EFX_TX_BUF_EFV;
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} while (new_write_count != tx_queue->insert_count);
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wmb(); /* Ensure descriptors are written before they are fetched */
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tx_queue->write_count = new_write_count;
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/* The write_count above must be updated before reading
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* channel->holdoff_doorbell to avoid a race with the
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* completion path, so ensure these operations are not
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* re-ordered. This also flushes the update of write_count
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* back into the cache.
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*/
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smp_mb();
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}
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void ef100_tx_write(struct efx_tx_queue *tx_queue)
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{
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ef100_tx_make_descriptors(tx_queue, NULL, 0, NULL);
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ef100_tx_push_buffers(tx_queue);
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}
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int ef100_ev_tx(struct efx_channel *channel, const efx_qword_t *p_event)
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{
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unsigned int tx_done =
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EFX_QWORD_FIELD(*p_event, ESF_GZ_EV_TXCMPL_NUM_DESC);
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unsigned int qlabel =
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EFX_QWORD_FIELD(*p_event, ESF_GZ_EV_TXCMPL_Q_LABEL);
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struct efx_tx_queue *tx_queue =
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efx_channel_get_tx_queue(channel, qlabel);
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unsigned int tx_index = (tx_queue->read_count + tx_done - 1) &
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tx_queue->ptr_mask;
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return efx_xmit_done(tx_queue, tx_index);
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}
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/* Add a socket buffer to a TX queue
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*
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* You must hold netif_tx_lock() to call this function.
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*
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* Returns 0 on success, error code otherwise. In case of an error this
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* function will free the SKB.
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*/
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netdev_tx_t ef100_enqueue_skb(struct efx_tx_queue *tx_queue,
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struct sk_buff *skb)
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{
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return __ef100_enqueue_skb(tx_queue, skb, NULL);
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}
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int __ef100_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb,
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struct efx_rep *efv)
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{
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unsigned int old_insert_count = tx_queue->insert_count;
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struct efx_nic *efx = tx_queue->efx;
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bool xmit_more = netdev_xmit_more();
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unsigned int fill_level;
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unsigned int segments;
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int rc;
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if (!tx_queue->buffer || !tx_queue->ptr_mask) {
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netif_stop_queue(efx->net_dev);
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dev_kfree_skb_any(skb);
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return -ENODEV;
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}
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segments = skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 0;
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if (segments == 1)
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segments = 0; /* Don't use TSO/GSO for a single segment. */
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if (segments && !ef100_tx_can_tso(tx_queue, skb)) {
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rc = efx_tx_tso_fallback(tx_queue, skb);
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tx_queue->tso_fallbacks++;
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if (rc)
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goto err;
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else
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return 0;
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}
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if (unlikely(efv)) {
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struct efx_tx_buffer *buffer = __efx_tx_queue_get_insert_buffer(tx_queue);
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/* Drop representor packets if the queue is stopped.
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* We currently don't assert backoff to representors so this is
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* to make sure representor traffic can't starve the main
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* net device.
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* And, of course, if there are no TX descriptors left.
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*/
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if (netif_tx_queue_stopped(tx_queue->core_txq) ||
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unlikely(efx_tx_buffer_in_use(buffer))) {
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atomic64_inc(&efv->stats.tx_errors);
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rc = -ENOSPC;
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goto err;
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}
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/* Also drop representor traffic if it could cause us to
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* stop the queue. If we assert backoff and we haven't
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* received traffic on the main net device recently then the
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* TX watchdog can go off erroneously.
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*/
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fill_level = efx_channel_tx_old_fill_level(tx_queue->channel);
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fill_level += efx_tx_max_skb_descs(efx);
|
|
if (fill_level > efx->txq_stop_thresh) {
|
|
struct efx_tx_queue *txq2;
|
|
|
|
/* Refresh cached fill level and re-check */
|
|
efx_for_each_channel_tx_queue(txq2, tx_queue->channel)
|
|
txq2->old_read_count = READ_ONCE(txq2->read_count);
|
|
|
|
fill_level = efx_channel_tx_old_fill_level(tx_queue->channel);
|
|
fill_level += efx_tx_max_skb_descs(efx);
|
|
if (fill_level > efx->txq_stop_thresh) {
|
|
atomic64_inc(&efv->stats.tx_errors);
|
|
rc = -ENOSPC;
|
|
goto err;
|
|
}
|
|
}
|
|
|
|
buffer->flags = EFX_TX_BUF_OPTION | EFX_TX_BUF_EFV;
|
|
tx_queue->insert_count++;
|
|
}
|
|
|
|
/* Map for DMA and create descriptors */
|
|
rc = efx_tx_map_data(tx_queue, skb, segments);
|
|
if (rc)
|
|
goto err;
|
|
ef100_tx_make_descriptors(tx_queue, skb, segments, efv);
|
|
|
|
fill_level = efx_channel_tx_old_fill_level(tx_queue->channel);
|
|
if (fill_level > efx->txq_stop_thresh) {
|
|
struct efx_tx_queue *txq2;
|
|
|
|
/* Because of checks above, representor traffic should
|
|
* not be able to stop the queue.
|
|
*/
|
|
WARN_ON(efv);
|
|
|
|
netif_tx_stop_queue(tx_queue->core_txq);
|
|
/* Re-read after a memory barrier in case we've raced with
|
|
* the completion path. Otherwise there's a danger we'll never
|
|
* restart the queue if all completions have just happened.
|
|
*/
|
|
smp_mb();
|
|
efx_for_each_channel_tx_queue(txq2, tx_queue->channel)
|
|
txq2->old_read_count = READ_ONCE(txq2->read_count);
|
|
fill_level = efx_channel_tx_old_fill_level(tx_queue->channel);
|
|
if (fill_level < efx->txq_stop_thresh)
|
|
netif_tx_start_queue(tx_queue->core_txq);
|
|
}
|
|
|
|
tx_queue->xmit_pending = true;
|
|
|
|
/* If xmit_more then we don't need to push the doorbell, unless there
|
|
* are 256 descriptors already queued in which case we have to push to
|
|
* ensure we never push more than 256 at once.
|
|
*
|
|
* Always push for representor traffic, and don't account it to parent
|
|
* PF netdevice's BQL.
|
|
*/
|
|
if (unlikely(efv) ||
|
|
__netdev_tx_sent_queue(tx_queue->core_txq, skb->len, xmit_more) ||
|
|
tx_queue->write_count - tx_queue->notify_count > 255)
|
|
ef100_tx_push_buffers(tx_queue);
|
|
|
|
if (segments) {
|
|
tx_queue->tso_bursts++;
|
|
tx_queue->tso_packets += segments;
|
|
tx_queue->tx_packets += segments;
|
|
} else {
|
|
tx_queue->tx_packets++;
|
|
}
|
|
return 0;
|
|
|
|
err:
|
|
efx_enqueue_unwind(tx_queue, old_insert_count);
|
|
if (!IS_ERR_OR_NULL(skb))
|
|
dev_kfree_skb_any(skb);
|
|
|
|
/* If we're not expecting another transmit and we had something to push
|
|
* on this queue then we need to push here to get the previous packets
|
|
* out. We only enter this branch from before the xmit_more handling
|
|
* above, so xmit_pending still refers to the old state.
|
|
*/
|
|
if (tx_queue->xmit_pending && !xmit_more)
|
|
ef100_tx_push_buffers(tx_queue);
|
|
return rc;
|
|
}
|