5cd2340cb6
The LAN8650/1 is designed to conform to the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification, Version 1.1. The IEEE Clause 4 MAC integration provides the low pin count standard SPI interface to any microcontroller therefore providing Ethernet functionality without requiring MAC integration within the microcontroller. The LAN8650/1 operates as an SPI client supporting SCLK clock rates up to a maximum of 25 MHz. This SPI interface supports the transfer of both data (Ethernet frames) and control (register access). By default, the chunk data payload is 64 bytes in size. The Ethernet Media Access Controller (MAC) module implements a 10 Mbps half duplex Ethernet MAC, compatible with the IEEE 802.3 standard. 10BASE-T1S physical layer transceiver integrated is into the LAN8650/1. The PHY and MAC are connected via an internal Media Independent Interface (MII). Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> Link: https://patch.msgid.link/20240909082514.262942-14-Parthiban.Veerasooran@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
17 lines
466 B
Makefile
17 lines
466 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
|
|
#
|
|
# Makefile for the Microchip network device drivers.
|
|
#
|
|
|
|
obj-$(CONFIG_ENC28J60) += enc28j60.o
|
|
obj-$(CONFIG_ENCX24J600) += encx24j600.o encx24j600-regmap.o
|
|
obj-$(CONFIG_LAN743X) += lan743x.o
|
|
|
|
lan743x-objs := lan743x_main.o lan743x_ethtool.o lan743x_ptp.o
|
|
|
|
obj-$(CONFIG_LAN865X) += lan865x/
|
|
obj-$(CONFIG_LAN966X_SWITCH) += lan966x/
|
|
obj-$(CONFIG_SPARX5_SWITCH) += sparx5/
|
|
obj-$(CONFIG_VCAP) += vcap/
|
|
obj-$(CONFIG_FDMA) += fdma/
|