1ca1443570
These registers are saved/restored together with the other general
registers using ptrace. In arch_set_tls we then just need to set the
register and it will be synced back normally.
Most of this logic was introduced in commit f355559cf7 ("[PATCH] uml:
x86_64 thread fixes"). However, at least today we can rely on ptrace to
restore the base registers for us. As such, only the part of the patch
that tracks the FS register for use as thread local storage is actually
needed.
Signed-off-by: Benjamin Berg <benjamin@sipsolutions.net>
Signed-off-by: Richard Weinberger <richard@nod.at>
35 lines
799 B
C
35 lines
799 B
C
/*
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* Copyright 2003 PathScale, Inc.
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*
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* Licensed under the GPL
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*/
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#ifndef __UM_PROCESSOR_X86_64_H
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#define __UM_PROCESSOR_X86_64_H
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struct arch_thread {
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unsigned long debugregs[8];
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int debugregs_seq;
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struct faultinfo faultinfo;
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};
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#define INIT_ARCH_THREAD { .debugregs = { [ 0 ... 7 ] = 0 }, \
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.debugregs_seq = 0, \
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.faultinfo = { 0, 0, 0 } }
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#define STACKSLOTS_PER_LINE 4
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static inline void arch_flush_thread(struct arch_thread *thread)
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{
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}
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static inline void arch_copy_thread(struct arch_thread *from,
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struct arch_thread *to)
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{
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}
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#define current_sp() ({ void *sp; __asm__("movq %%rsp, %0" : "=r" (sp) : ); sp; })
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#define current_bp() ({ unsigned long bp; __asm__("movq %%rbp, %0" : "=r" (bp) : ); bp; })
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#endif
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