5323922f50
Sparse rightfully complains about using a plain pointer for per CPU accessors: msr-smp.c:15:23: sparse: warning: incorrect type in initializer (different address spaces) msr-smp.c:15:23: sparse: expected void const [noderef] __percpu *__vpp_verify msr-smp.c:15:23: sparse: got struct msr * Add __percpu annotations to the related datastructure and function arguments to cure this. This also cures the related sparse warnings at the callsites in drivers/edac/amd64_edac.c. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20240304005104.513181735@linutronix.de
145 lines
2.6 KiB
C
145 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/export.h>
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#include <linux/percpu.h>
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#include <linux/preempt.h>
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#include <asm/msr.h>
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#define CREATE_TRACE_POINTS
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#include <asm/msr-trace.h>
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struct msr __percpu *msrs_alloc(void)
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{
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struct msr __percpu *msrs = NULL;
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msrs = alloc_percpu(struct msr);
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if (!msrs) {
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pr_warn("%s: error allocating msrs\n", __func__);
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return NULL;
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}
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return msrs;
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}
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EXPORT_SYMBOL(msrs_alloc);
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void msrs_free(struct msr __percpu *msrs)
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{
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free_percpu(msrs);
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}
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EXPORT_SYMBOL(msrs_free);
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/**
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* msr_read - Read an MSR with error handling
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* @msr: MSR to read
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* @m: value to read into
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*
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* It returns read data only on success, otherwise it doesn't change the output
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* argument @m.
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*
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* Return: %0 for success, otherwise an error code
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*/
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static int msr_read(u32 msr, struct msr *m)
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{
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int err;
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u64 val;
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err = rdmsrl_safe(msr, &val);
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if (!err)
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m->q = val;
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return err;
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}
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/**
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* msr_write - Write an MSR with error handling
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*
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* @msr: MSR to write
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* @m: value to write
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*
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* Return: %0 for success, otherwise an error code
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*/
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static int msr_write(u32 msr, struct msr *m)
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{
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return wrmsrl_safe(msr, m->q);
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}
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static inline int __flip_bit(u32 msr, u8 bit, bool set)
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{
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struct msr m, m1;
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int err = -EINVAL;
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if (bit > 63)
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return err;
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err = msr_read(msr, &m);
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if (err)
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return err;
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m1 = m;
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if (set)
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m1.q |= BIT_64(bit);
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else
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m1.q &= ~BIT_64(bit);
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if (m1.q == m.q)
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return 0;
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err = msr_write(msr, &m1);
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if (err)
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return err;
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return 1;
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}
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/**
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* msr_set_bit - Set @bit in a MSR @msr.
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* @msr: MSR to write
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* @bit: bit number to set
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*
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* Return:
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* * < 0: An error was encountered.
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* * = 0: Bit was already set.
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* * > 0: Hardware accepted the MSR write.
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*/
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int msr_set_bit(u32 msr, u8 bit)
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{
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return __flip_bit(msr, bit, true);
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}
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/**
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* msr_clear_bit - Clear @bit in a MSR @msr.
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* @msr: MSR to write
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* @bit: bit number to clear
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*
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* Return:
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* * < 0: An error was encountered.
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* * = 0: Bit was already cleared.
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* * > 0: Hardware accepted the MSR write.
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*/
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int msr_clear_bit(u32 msr, u8 bit)
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{
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return __flip_bit(msr, bit, false);
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}
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#ifdef CONFIG_TRACEPOINTS
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void do_trace_write_msr(unsigned int msr, u64 val, int failed)
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{
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trace_write_msr(msr, val, failed);
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}
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EXPORT_SYMBOL(do_trace_write_msr);
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EXPORT_TRACEPOINT_SYMBOL(write_msr);
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void do_trace_read_msr(unsigned int msr, u64 val, int failed)
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{
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trace_read_msr(msr, val, failed);
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}
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EXPORT_SYMBOL(do_trace_read_msr);
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EXPORT_TRACEPOINT_SYMBOL(read_msr);
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void do_trace_rdpmc(unsigned counter, u64 val, int failed)
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{
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trace_rdpmc(counter, val, failed);
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}
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EXPORT_SYMBOL(do_trace_rdpmc);
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EXPORT_TRACEPOINT_SYMBOL(rdpmc);
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#endif
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