ffb20c2e52
In some cases, when probing a perf MSR, we're probing certain bits of the MSR instead of the whole register, thus only these bits should be checked. For example, for RAPL ENERGY_STATUS MSR, only the lower 32 bits represents the energy counter, and the higher 32bits are reserved. Introduce a new mask field in struct perf_msr to allow probing certain bits of a MSR. This change is transparent to the current perf_msr_probe() users. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/20210204161816.12649-1-rui.zhang@intel.com
64 lines
1.3 KiB
C
64 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/bits.h>
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#include "probe.h"
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static umode_t
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not_visible(struct kobject *kobj, struct attribute *attr, int i)
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{
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return 0;
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}
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/*
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* Accepts msr[] array with non populated entries as long as either
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* msr[i].msr is 0 or msr[i].grp is NULL. Note that the default sysfs
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* visibility is visible when group->is_visible callback is set.
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*/
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unsigned long
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perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data)
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{
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unsigned long avail = 0;
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unsigned int bit;
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u64 val;
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if (cnt >= BITS_PER_LONG)
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return 0;
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for (bit = 0; bit < cnt; bit++) {
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if (!msr[bit].no_check) {
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struct attribute_group *grp = msr[bit].grp;
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u64 mask;
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/* skip entry with no group */
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if (!grp)
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continue;
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grp->is_visible = not_visible;
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/* skip unpopulated entry */
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if (!msr[bit].msr)
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continue;
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if (msr[bit].test && !msr[bit].test(bit, data))
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continue;
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/* Virt sucks; you cannot tell if a R/O MSR is present :/ */
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if (rdmsrl_safe(msr[bit].msr, &val))
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continue;
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mask = msr[bit].mask;
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if (!mask)
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mask = ~0ULL;
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/* Disable zero counters if requested. */
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if (!zero && !(val & mask))
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continue;
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grp->is_visible = NULL;
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}
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avail |= BIT(bit);
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}
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return avail;
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}
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EXPORT_SYMBOL_GPL(perf_msr_probe);
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