69fd3876a4
Allows a PV guest to use crypto cards. Card access is governed by the firmware and once a crypto queue is "bound" to a PV VM every other entity (PV or not) looses access until it is not bound anymore. Enablement is done via flags when creating the PV VM. - Guest debug fixes (Ilya) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEwGNS88vfc9+v45Yq41TmuOI4ufgFAmTsgQ8ACgkQ41TmuOI4 ufgCtRAAvSx+XmHhTL4D6QJsEm2Ahgz+9VKxlD91r+gbuw1h9rcZJcSGnZ41nxW1 rl/cEL4sGyEP8SjlKm9LB18mJ7LoJJaCIpzckWqmbGVvkdIXd45VxvppiSWCSq3X TaFtfmXLi0iFznVHMHAR53if2t/exNXHHEwjAGm1byVUXy4xgqLaaXrdYBSRGVPQ pmHoIJTlZUux/eOSrXEzsGPuza+dIQBilvZZRs1SZJmlh0rz39XX29GZTHHv6ant 8dkf5Q2Lkvs+jI6+6i4YCLQFzXixcLgaBjRRvRnE8aCP8/DbSjR+S+Qu4mMfWFtp 2oO2X7rwB/vu8FM06TxRrif/03crxaYtFdWbmGJUhhwp9DS7WO27sk61Z/yWHQFX cviKEEvn3DvtBrrBtKrbEa04depRuwpQfwkbtnFDkGbDgxeekswMO81xV9T8VNxF teyUyS9Fev4XuAjmBS2F1dHv9i/Sl2uB/Uh14GvTkyBOQzrcRw8dONR0ppVi9OVO k0pjj9JmKpE+F39IuDYK0H+G82X67YQLk3yZfAF0zfVxV6ZrpEPtnsPe2rYPD5bW zdMfzOiTeBVt+JTy9Dqkt2NWjWfjt+k7ws00q4ijDlcNYLO3cgIIYUPsim53Ccue AG6iYyu4/o8hOSi2LkjEaPeC+wrCVfqKUOjzVa8FcZfy0wFKVdc= =E2KD -----END PGP SIGNATURE----- Merge tag 'kvm-s390-next-6.6-1' of https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD - PV crypto passthrough enablement (Tony, Steffen, Viktor, Janosch) Allows a PV guest to use crypto cards. Card access is governed by the firmware and once a crypto queue is "bound" to a PV VM every other entity (PV or not) looses access until it is not bound anymore. Enablement is done via flags when creating the PV VM. - Guest debug fixes (Ilya)
668 lines
18 KiB
C
668 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* in-kernel handling for sie intercepts
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*
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* Copyright IBM Corp. 2008, 2020
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*
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* Author(s): Carsten Otte <cotte@de.ibm.com>
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* Christian Borntraeger <borntraeger@de.ibm.com>
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*/
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#include <linux/kvm_host.h>
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#include <linux/errno.h>
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#include <linux/pagemap.h>
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#include <asm/asm-offsets.h>
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#include <asm/irq.h>
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#include <asm/sysinfo.h>
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#include <asm/uv.h>
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#include "kvm-s390.h"
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#include "gaccess.h"
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#include "trace.h"
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#include "trace-s390.h"
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u8 kvm_s390_get_ilen(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_sie_block *sie_block = vcpu->arch.sie_block;
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u8 ilen = 0;
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switch (vcpu->arch.sie_block->icptcode) {
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case ICPT_INST:
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case ICPT_INSTPROGI:
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case ICPT_OPEREXC:
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case ICPT_PARTEXEC:
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case ICPT_IOINST:
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/* instruction only stored for these icptcodes */
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ilen = insn_length(vcpu->arch.sie_block->ipa >> 8);
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/* Use the length of the EXECUTE instruction if necessary */
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if (sie_block->icptstatus & 1) {
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ilen = (sie_block->icptstatus >> 4) & 0x6;
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if (!ilen)
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ilen = 4;
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}
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break;
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case ICPT_PROGI:
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/* bit 1+2 of pgmilc are the ilc, so we directly get ilen */
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ilen = vcpu->arch.sie_block->pgmilc & 0x6;
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break;
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}
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return ilen;
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}
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static int handle_stop(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int;
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int rc = 0;
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uint8_t flags, stop_pending;
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vcpu->stat.exit_stop_request++;
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/* delay the stop if any non-stop irq is pending */
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if (kvm_s390_vcpu_has_irq(vcpu, 1))
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return 0;
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/* avoid races with the injection/SIGP STOP code */
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spin_lock(&li->lock);
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flags = li->irq.stop.flags;
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stop_pending = kvm_s390_is_stop_irq_pending(vcpu);
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spin_unlock(&li->lock);
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trace_kvm_s390_stop_request(stop_pending, flags);
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if (!stop_pending)
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return 0;
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if (flags & KVM_S390_STOP_FLAG_STORE_STATUS) {
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rc = kvm_s390_vcpu_store_status(vcpu,
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KVM_S390_STORE_STATUS_NOADDR);
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if (rc)
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return rc;
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}
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/*
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* no need to check the return value of vcpu_stop as it can only have
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* an error for protvirt, but protvirt means user cpu state
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*/
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if (!kvm_s390_user_cpu_state_ctrl(vcpu->kvm))
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kvm_s390_vcpu_stop(vcpu);
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return -EOPNOTSUPP;
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}
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static int handle_validity(struct kvm_vcpu *vcpu)
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{
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int viwhy = vcpu->arch.sie_block->ipb >> 16;
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vcpu->stat.exit_validity++;
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trace_kvm_s390_intercept_validity(vcpu, viwhy);
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KVM_EVENT(3, "validity intercept 0x%x for pid %u (kvm 0x%pK)", viwhy,
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current->pid, vcpu->kvm);
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/* do not warn on invalid runtime instrumentation mode */
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WARN_ONCE(viwhy != 0x44, "kvm: unhandled validity intercept 0x%x\n",
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viwhy);
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return -EINVAL;
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}
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static int handle_instruction(struct kvm_vcpu *vcpu)
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{
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vcpu->stat.exit_instruction++;
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trace_kvm_s390_intercept_instruction(vcpu,
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vcpu->arch.sie_block->ipa,
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vcpu->arch.sie_block->ipb);
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switch (vcpu->arch.sie_block->ipa >> 8) {
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case 0x01:
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return kvm_s390_handle_01(vcpu);
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case 0x82:
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return kvm_s390_handle_lpsw(vcpu);
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case 0x83:
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return kvm_s390_handle_diag(vcpu);
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case 0xaa:
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return kvm_s390_handle_aa(vcpu);
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case 0xae:
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return kvm_s390_handle_sigp(vcpu);
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case 0xb2:
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return kvm_s390_handle_b2(vcpu);
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case 0xb6:
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return kvm_s390_handle_stctl(vcpu);
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case 0xb7:
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return kvm_s390_handle_lctl(vcpu);
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case 0xb9:
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return kvm_s390_handle_b9(vcpu);
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case 0xe3:
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return kvm_s390_handle_e3(vcpu);
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case 0xe5:
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return kvm_s390_handle_e5(vcpu);
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case 0xeb:
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return kvm_s390_handle_eb(vcpu);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int inject_prog_on_prog_intercept(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_pgm_info pgm_info = {
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.code = vcpu->arch.sie_block->iprcc,
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/* the PSW has already been rewound */
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.flags = KVM_S390_PGM_FLAGS_NO_REWIND,
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};
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switch (vcpu->arch.sie_block->iprcc & ~PGM_PER) {
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case PGM_AFX_TRANSLATION:
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case PGM_ASX_TRANSLATION:
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case PGM_EX_TRANSLATION:
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case PGM_LFX_TRANSLATION:
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case PGM_LSTE_SEQUENCE:
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case PGM_LSX_TRANSLATION:
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case PGM_LX_TRANSLATION:
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case PGM_PRIMARY_AUTHORITY:
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case PGM_SECONDARY_AUTHORITY:
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case PGM_SPACE_SWITCH:
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pgm_info.trans_exc_code = vcpu->arch.sie_block->tecmc;
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break;
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case PGM_ALEN_TRANSLATION:
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case PGM_ALE_SEQUENCE:
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case PGM_ASTE_INSTANCE:
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case PGM_ASTE_SEQUENCE:
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case PGM_ASTE_VALIDITY:
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case PGM_EXTENDED_AUTHORITY:
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pgm_info.exc_access_id = vcpu->arch.sie_block->eai;
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break;
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case PGM_ASCE_TYPE:
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case PGM_PAGE_TRANSLATION:
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case PGM_REGION_FIRST_TRANS:
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case PGM_REGION_SECOND_TRANS:
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case PGM_REGION_THIRD_TRANS:
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case PGM_SEGMENT_TRANSLATION:
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pgm_info.trans_exc_code = vcpu->arch.sie_block->tecmc;
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pgm_info.exc_access_id = vcpu->arch.sie_block->eai;
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pgm_info.op_access_id = vcpu->arch.sie_block->oai;
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break;
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case PGM_MONITOR:
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pgm_info.mon_class_nr = vcpu->arch.sie_block->mcn;
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pgm_info.mon_code = vcpu->arch.sie_block->tecmc;
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break;
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case PGM_VECTOR_PROCESSING:
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case PGM_DATA:
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pgm_info.data_exc_code = vcpu->arch.sie_block->dxc;
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break;
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case PGM_PROTECTION:
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pgm_info.trans_exc_code = vcpu->arch.sie_block->tecmc;
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pgm_info.exc_access_id = vcpu->arch.sie_block->eai;
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break;
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default:
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break;
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}
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if (vcpu->arch.sie_block->iprcc & PGM_PER) {
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pgm_info.per_code = vcpu->arch.sie_block->perc;
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pgm_info.per_atmid = vcpu->arch.sie_block->peratmid;
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pgm_info.per_address = vcpu->arch.sie_block->peraddr;
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pgm_info.per_access_id = vcpu->arch.sie_block->peraid;
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}
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return kvm_s390_inject_prog_irq(vcpu, &pgm_info);
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}
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/*
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* restore ITDB to program-interruption TDB in guest lowcore
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* and set TX abort indication if required
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*/
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static int handle_itdb(struct kvm_vcpu *vcpu)
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{
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struct kvm_s390_itdb *itdb;
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int rc;
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if (!IS_TE_ENABLED(vcpu) || !IS_ITDB_VALID(vcpu))
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return 0;
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if (current->thread.per_flags & PER_FLAG_NO_TE)
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return 0;
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itdb = phys_to_virt(vcpu->arch.sie_block->itdba);
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rc = write_guest_lc(vcpu, __LC_PGM_TDB, itdb, sizeof(*itdb));
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if (rc)
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return rc;
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memset(itdb, 0, sizeof(*itdb));
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return 0;
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}
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#define per_event(vcpu) (vcpu->arch.sie_block->iprcc & PGM_PER)
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static bool should_handle_per_event(const struct kvm_vcpu *vcpu)
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{
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if (!guestdbg_enabled(vcpu) || !per_event(vcpu))
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return false;
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if (guestdbg_sstep_enabled(vcpu) &&
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vcpu->arch.sie_block->iprcc != PGM_PER) {
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/*
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* __vcpu_run() will exit after delivering the concurrently
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* indicated condition.
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*/
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return false;
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}
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return true;
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}
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static int handle_prog(struct kvm_vcpu *vcpu)
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{
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psw_t psw;
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int rc;
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vcpu->stat.exit_program_interruption++;
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/*
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* Intercept 8 indicates a loop of specification exceptions
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* for protected guests.
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*/
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if (kvm_s390_pv_cpu_is_protected(vcpu))
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return -EOPNOTSUPP;
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if (should_handle_per_event(vcpu)) {
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rc = kvm_s390_handle_per_event(vcpu);
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if (rc)
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return rc;
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/* the interrupt might have been filtered out completely */
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if (vcpu->arch.sie_block->iprcc == 0)
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return 0;
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}
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trace_kvm_s390_intercept_prog(vcpu, vcpu->arch.sie_block->iprcc);
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if (vcpu->arch.sie_block->iprcc == PGM_SPECIFICATION) {
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rc = read_guest_lc(vcpu, __LC_PGM_NEW_PSW, &psw, sizeof(psw_t));
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if (rc)
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return rc;
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/* Avoid endless loops of specification exceptions */
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if (!is_valid_psw(&psw))
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return -EOPNOTSUPP;
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}
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rc = handle_itdb(vcpu);
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if (rc)
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return rc;
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return inject_prog_on_prog_intercept(vcpu);
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}
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/**
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* handle_external_interrupt - used for external interruption interceptions
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* @vcpu: virtual cpu
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*
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* This interception occurs if:
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* - the CPUSTAT_EXT_INT bit was already set when the external interrupt
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* occurred. In this case, the interrupt needs to be injected manually to
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* preserve interrupt priority.
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* - the external new PSW has external interrupts enabled, which will cause an
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* interruption loop. We drop to userspace in this case.
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*
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* The latter case can be detected by inspecting the external mask bit in the
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* external new psw.
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*
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* Under PV, only the latter case can occur, since interrupt priorities are
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* handled in the ultravisor.
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*/
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static int handle_external_interrupt(struct kvm_vcpu *vcpu)
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{
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u16 eic = vcpu->arch.sie_block->eic;
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struct kvm_s390_irq irq;
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psw_t newpsw;
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int rc;
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vcpu->stat.exit_external_interrupt++;
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if (kvm_s390_pv_cpu_is_protected(vcpu)) {
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newpsw = vcpu->arch.sie_block->gpsw;
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} else {
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rc = read_guest_lc(vcpu, __LC_EXT_NEW_PSW, &newpsw, sizeof(psw_t));
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if (rc)
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return rc;
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}
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/*
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* Clock comparator or timer interrupt with external interrupt enabled
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* will cause interrupt loop. Drop to userspace.
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*/
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if ((eic == EXT_IRQ_CLK_COMP || eic == EXT_IRQ_CPU_TIMER) &&
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(newpsw.mask & PSW_MASK_EXT))
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return -EOPNOTSUPP;
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switch (eic) {
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case EXT_IRQ_CLK_COMP:
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irq.type = KVM_S390_INT_CLOCK_COMP;
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break;
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case EXT_IRQ_CPU_TIMER:
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irq.type = KVM_S390_INT_CPU_TIMER;
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break;
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case EXT_IRQ_EXTERNAL_CALL:
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irq.type = KVM_S390_INT_EXTERNAL_CALL;
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irq.u.extcall.code = vcpu->arch.sie_block->extcpuaddr;
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rc = kvm_s390_inject_vcpu(vcpu, &irq);
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/* ignore if another external call is already pending */
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if (rc == -EBUSY)
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return 0;
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return rc;
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default:
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return -EOPNOTSUPP;
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}
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return kvm_s390_inject_vcpu(vcpu, &irq);
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}
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/**
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* handle_mvpg_pei - Handle MOVE PAGE partial execution interception.
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* @vcpu: virtual cpu
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*
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* This interception can only happen for guests with DAT disabled and
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* addresses that are currently not mapped in the host. Thus we try to
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* set up the mappings for the corresponding user pages here (or throw
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* addressing exceptions in case of illegal guest addresses).
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*/
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static int handle_mvpg_pei(struct kvm_vcpu *vcpu)
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{
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unsigned long srcaddr, dstaddr;
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int reg1, reg2, rc;
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kvm_s390_get_regs_rre(vcpu, ®1, ®2);
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/* Ensure that the source is paged-in, no actual access -> no key checking */
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rc = guest_translate_address_with_key(vcpu, vcpu->run->s.regs.gprs[reg2],
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reg2, &srcaddr, GACC_FETCH, 0);
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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rc = kvm_arch_fault_in_page(vcpu, srcaddr, 0);
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if (rc != 0)
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return rc;
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/* Ensure that the source is paged-in, no actual access -> no key checking */
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rc = guest_translate_address_with_key(vcpu, vcpu->run->s.regs.gprs[reg1],
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reg1, &dstaddr, GACC_STORE, 0);
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if (rc)
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return kvm_s390_inject_prog_cond(vcpu, rc);
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rc = kvm_arch_fault_in_page(vcpu, dstaddr, 1);
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if (rc != 0)
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return rc;
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kvm_s390_retry_instr(vcpu);
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return 0;
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}
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static int handle_partial_execution(struct kvm_vcpu *vcpu)
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{
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vcpu->stat.exit_pei++;
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if (vcpu->arch.sie_block->ipa == 0xb254) /* MVPG */
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return handle_mvpg_pei(vcpu);
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if (vcpu->arch.sie_block->ipa >> 8 == 0xae) /* SIGP */
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return kvm_s390_handle_sigp_pei(vcpu);
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return -EOPNOTSUPP;
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}
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/*
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* Handle the sthyi instruction that provides the guest with system
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* information, like current CPU resources available at each level of
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* the machine.
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*/
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int handle_sthyi(struct kvm_vcpu *vcpu)
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{
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int reg1, reg2, cc = 0, r = 0;
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u64 code, addr, rc = 0;
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struct sthyi_sctns *sctns = NULL;
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if (!test_kvm_facility(vcpu->kvm, 74))
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return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
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kvm_s390_get_regs_rre(vcpu, ®1, ®2);
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code = vcpu->run->s.regs.gprs[reg1];
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addr = vcpu->run->s.regs.gprs[reg2];
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vcpu->stat.instruction_sthyi++;
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VCPU_EVENT(vcpu, 3, "STHYI: fc: %llu addr: 0x%016llx", code, addr);
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trace_kvm_s390_handle_sthyi(vcpu, code, addr);
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if (reg1 == reg2 || reg1 & 1 || reg2 & 1)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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if (code & 0xffff) {
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cc = 3;
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rc = 4;
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goto out;
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}
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if (!kvm_s390_pv_cpu_is_protected(vcpu) && (addr & ~PAGE_MASK))
|
|
return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
|
|
|
|
sctns = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
|
|
if (!sctns)
|
|
return -ENOMEM;
|
|
|
|
cc = sthyi_fill(sctns, &rc);
|
|
if (cc < 0) {
|
|
free_page((unsigned long)sctns);
|
|
return cc;
|
|
}
|
|
out:
|
|
if (!cc) {
|
|
if (kvm_s390_pv_cpu_is_protected(vcpu)) {
|
|
memcpy(sida_addr(vcpu->arch.sie_block), sctns, PAGE_SIZE);
|
|
} else {
|
|
r = write_guest(vcpu, addr, reg2, sctns, PAGE_SIZE);
|
|
if (r) {
|
|
free_page((unsigned long)sctns);
|
|
return kvm_s390_inject_prog_cond(vcpu, r);
|
|
}
|
|
}
|
|
}
|
|
|
|
free_page((unsigned long)sctns);
|
|
vcpu->run->s.regs.gprs[reg2 + 1] = rc;
|
|
kvm_s390_set_psw_cc(vcpu, cc);
|
|
return r;
|
|
}
|
|
|
|
static int handle_operexc(struct kvm_vcpu *vcpu)
|
|
{
|
|
psw_t oldpsw, newpsw;
|
|
int rc;
|
|
|
|
vcpu->stat.exit_operation_exception++;
|
|
trace_kvm_s390_handle_operexc(vcpu, vcpu->arch.sie_block->ipa,
|
|
vcpu->arch.sie_block->ipb);
|
|
|
|
if (vcpu->arch.sie_block->ipa == 0xb256)
|
|
return handle_sthyi(vcpu);
|
|
|
|
if (vcpu->arch.sie_block->ipa == 0 && vcpu->kvm->arch.user_instr0)
|
|
return -EOPNOTSUPP;
|
|
rc = read_guest_lc(vcpu, __LC_PGM_NEW_PSW, &newpsw, sizeof(psw_t));
|
|
if (rc)
|
|
return rc;
|
|
/*
|
|
* Avoid endless loops of operation exceptions, if the pgm new
|
|
* PSW will cause a new operation exception.
|
|
* The heuristic checks if the pgm new psw is within 6 bytes before
|
|
* the faulting psw address (with same DAT, AS settings) and the
|
|
* new psw is not a wait psw and the fault was not triggered by
|
|
* problem state.
|
|
*/
|
|
oldpsw = vcpu->arch.sie_block->gpsw;
|
|
if (oldpsw.addr - newpsw.addr <= 6 &&
|
|
!(newpsw.mask & PSW_MASK_WAIT) &&
|
|
!(oldpsw.mask & PSW_MASK_PSTATE) &&
|
|
(newpsw.mask & PSW_MASK_ASC) == (oldpsw.mask & PSW_MASK_ASC) &&
|
|
(newpsw.mask & PSW_MASK_DAT) == (oldpsw.mask & PSW_MASK_DAT))
|
|
return -EOPNOTSUPP;
|
|
|
|
return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
|
|
}
|
|
|
|
static int handle_pv_spx(struct kvm_vcpu *vcpu)
|
|
{
|
|
u32 pref = *(u32 *)sida_addr(vcpu->arch.sie_block);
|
|
|
|
kvm_s390_set_prefix(vcpu, pref);
|
|
trace_kvm_s390_handle_prefix(vcpu, 1, pref);
|
|
return 0;
|
|
}
|
|
|
|
static int handle_pv_sclp(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
|
|
|
|
spin_lock(&fi->lock);
|
|
/*
|
|
* 2 cases:
|
|
* a: an sccb answering interrupt was already pending or in flight.
|
|
* As the sccb value is not known we can simply set some value to
|
|
* trigger delivery of a saved SCCB. UV will then use its saved
|
|
* copy of the SCCB value.
|
|
* b: an error SCCB interrupt needs to be injected so we also inject
|
|
* a fake SCCB address. Firmware will use the proper one.
|
|
* This makes sure, that both errors and real sccb returns will only
|
|
* be delivered after a notification intercept (instruction has
|
|
* finished) but not after others.
|
|
*/
|
|
fi->srv_signal.ext_params |= 0x43000;
|
|
set_bit(IRQ_PEND_EXT_SERVICE, &fi->pending_irqs);
|
|
clear_bit(IRQ_PEND_EXT_SERVICE, &fi->masked_irqs);
|
|
spin_unlock(&fi->lock);
|
|
return 0;
|
|
}
|
|
|
|
static int handle_pv_uvc(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct uv_cb_share *guest_uvcb = sida_addr(vcpu->arch.sie_block);
|
|
struct uv_cb_cts uvcb = {
|
|
.header.cmd = UVC_CMD_UNPIN_PAGE_SHARED,
|
|
.header.len = sizeof(uvcb),
|
|
.guest_handle = kvm_s390_pv_get_handle(vcpu->kvm),
|
|
.gaddr = guest_uvcb->paddr,
|
|
};
|
|
int rc;
|
|
|
|
if (guest_uvcb->header.cmd != UVC_CMD_REMOVE_SHARED_ACCESS) {
|
|
WARN_ONCE(1, "Unexpected notification intercept for UVC 0x%x\n",
|
|
guest_uvcb->header.cmd);
|
|
return 0;
|
|
}
|
|
rc = gmap_make_secure(vcpu->arch.gmap, uvcb.gaddr, &uvcb);
|
|
/*
|
|
* If the unpin did not succeed, the guest will exit again for the UVC
|
|
* and we will retry the unpin.
|
|
*/
|
|
if (rc == -EINVAL)
|
|
return 0;
|
|
/*
|
|
* If we got -EAGAIN here, we simply return it. It will eventually
|
|
* get propagated all the way to userspace, which should then try
|
|
* again.
|
|
*/
|
|
return rc;
|
|
}
|
|
|
|
static int handle_pv_notification(struct kvm_vcpu *vcpu)
|
|
{
|
|
int ret;
|
|
|
|
if (vcpu->arch.sie_block->ipa == 0xb210)
|
|
return handle_pv_spx(vcpu);
|
|
if (vcpu->arch.sie_block->ipa == 0xb220)
|
|
return handle_pv_sclp(vcpu);
|
|
if (vcpu->arch.sie_block->ipa == 0xb9a4)
|
|
return handle_pv_uvc(vcpu);
|
|
if (vcpu->arch.sie_block->ipa >> 8 == 0xae) {
|
|
/*
|
|
* Besides external call, other SIGP orders also cause a
|
|
* 108 (pv notify) intercept. In contrast to external call,
|
|
* these orders need to be emulated and hence the appropriate
|
|
* place to handle them is in handle_instruction().
|
|
* So first try kvm_s390_handle_sigp_pei() and if that isn't
|
|
* successful, go on with handle_instruction().
|
|
*/
|
|
ret = kvm_s390_handle_sigp_pei(vcpu);
|
|
if (!ret)
|
|
return ret;
|
|
}
|
|
|
|
return handle_instruction(vcpu);
|
|
}
|
|
|
|
static bool should_handle_per_ifetch(const struct kvm_vcpu *vcpu, int rc)
|
|
{
|
|
/* Process PER, also if the instruction is processed in user space. */
|
|
if (!(vcpu->arch.sie_block->icptstatus & 0x02))
|
|
return false;
|
|
if (rc != 0 && rc != -EOPNOTSUPP)
|
|
return false;
|
|
if (guestdbg_sstep_enabled(vcpu) && vcpu->arch.local_int.pending_irqs)
|
|
/* __vcpu_run() will exit after delivering the interrupt. */
|
|
return false;
|
|
return true;
|
|
}
|
|
|
|
int kvm_handle_sie_intercept(struct kvm_vcpu *vcpu)
|
|
{
|
|
int rc, per_rc = 0;
|
|
|
|
if (kvm_is_ucontrol(vcpu->kvm))
|
|
return -EOPNOTSUPP;
|
|
|
|
switch (vcpu->arch.sie_block->icptcode) {
|
|
case ICPT_EXTREQ:
|
|
vcpu->stat.exit_external_request++;
|
|
return 0;
|
|
case ICPT_IOREQ:
|
|
vcpu->stat.exit_io_request++;
|
|
return 0;
|
|
case ICPT_INST:
|
|
rc = handle_instruction(vcpu);
|
|
break;
|
|
case ICPT_PROGI:
|
|
return handle_prog(vcpu);
|
|
case ICPT_EXTINT:
|
|
return handle_external_interrupt(vcpu);
|
|
case ICPT_WAIT:
|
|
return kvm_s390_handle_wait(vcpu);
|
|
case ICPT_VALIDITY:
|
|
return handle_validity(vcpu);
|
|
case ICPT_STOP:
|
|
return handle_stop(vcpu);
|
|
case ICPT_OPEREXC:
|
|
rc = handle_operexc(vcpu);
|
|
break;
|
|
case ICPT_PARTEXEC:
|
|
rc = handle_partial_execution(vcpu);
|
|
break;
|
|
case ICPT_KSS:
|
|
/* Instruction will be redriven, skip the PER check. */
|
|
return kvm_s390_skey_check_enable(vcpu);
|
|
case ICPT_MCHKREQ:
|
|
case ICPT_INT_ENABLE:
|
|
/*
|
|
* PSW bit 13 or a CR (0, 6, 14) changed and we might
|
|
* now be able to deliver interrupts. The pre-run code
|
|
* will take care of this.
|
|
*/
|
|
rc = 0;
|
|
break;
|
|
case ICPT_PV_INSTR:
|
|
rc = handle_instruction(vcpu);
|
|
break;
|
|
case ICPT_PV_NOTIFY:
|
|
rc = handle_pv_notification(vcpu);
|
|
break;
|
|
case ICPT_PV_PREF:
|
|
rc = 0;
|
|
gmap_convert_to_secure(vcpu->arch.gmap,
|
|
kvm_s390_get_prefix(vcpu));
|
|
gmap_convert_to_secure(vcpu->arch.gmap,
|
|
kvm_s390_get_prefix(vcpu) + PAGE_SIZE);
|
|
break;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
|
|
if (should_handle_per_ifetch(vcpu, rc))
|
|
per_rc = kvm_s390_handle_per_ifetch_icpt(vcpu);
|
|
return per_rc ? per_rc : rc;
|
|
}
|