eb24af5d7a
Add implementations of AES-ECB, AES-CBC, AES-CTR, and AES-XTS, as well as bare (single-block) AES, using the RISC-V vector crypto extensions. The assembly code is derived from OpenSSL code (openssl/openssl#21923) that was dual-licensed so that it could be reused in the kernel. Nevertheless, the assembly has been significantly reworked for integration with the kernel, for example by using regular .S files instead of the so-called perlasm, using the assembler instead of bare '.inst', greatly reducing code duplication, supporting AES-192, and making the code use the same AES key structure as the C code. Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com> Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com> Signed-off-by: Jerry Shih <jerry.shih@sifive.com> Co-developed-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Eric Biggers <ebiggers@google.com> Link: https://lore.kernel.org/r/20240122002024.27477-5-ebiggers@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
147 lines
4.7 KiB
ArmAsm
147 lines
4.7 KiB
ArmAsm
/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
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//
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// This file is dual-licensed, meaning that you can use it under your
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// choice of either of the following two licenses:
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//
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// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.
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//
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// Licensed under the Apache License 2.0 (the "License"). You can obtain
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// a copy in the file LICENSE in the source distribution or at
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// https://www.openssl.org/source/license.html
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//
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// or
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//
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// Copyright (c) 2023, Jerry Shih <jerry.shih@sifive.com>
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// Copyright 2024 Google LLC
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// The generated code of this file depends on the following RISC-V extensions:
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// - RV64I
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// - RISC-V Vector ('V') with VLEN >= 128
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// - RISC-V Vector AES block cipher extension ('Zvkned')
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// - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')
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#include <linux/linkage.h>
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.text
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.option arch, +zvkned, +zvkb
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#include "aes-macros.S"
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#define KEYP a0
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#define INP a1
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#define OUTP a2
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#define LEN a3
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#define IVP a4
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#define LEN32 a5
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#define VL_E32 a6
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#define VL_BLOCKS a7
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.macro aes_ctr32_crypt keylen
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// LEN32 = number of blocks, rounded up, in 32-bit words.
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addi t0, LEN, 15
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srli t0, t0, 4
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slli LEN32, t0, 2
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// Create a mask that selects the last 32-bit word of each 128-bit
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// block. This is the word that contains the (big-endian) counter.
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li t0, 0x88
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vsetvli t1, zero, e8, m1, ta, ma
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vmv.v.x v0, t0
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// Load the IV into v31. The last 32-bit word contains the counter.
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vsetivli zero, 4, e32, m1, ta, ma
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vle32.v v31, (IVP)
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// Convert the big-endian counter into little-endian.
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vsetivli zero, 4, e32, m1, ta, mu
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vrev8.v v31, v31, v0.t
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// Splat the IV to v16 (with LMUL=4). The number of copies is the
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// maximum number of blocks that will be processed per iteration.
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vsetvli zero, LEN32, e32, m4, ta, ma
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vmv.v.i v16, 0
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vaesz.vs v16, v31
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// v20 = [x, x, x, 0, x, x, x, 1, ...]
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viota.m v20, v0, v0.t
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// v16 = [IV0, IV1, IV2, counter+0, IV0, IV1, IV2, counter+1, ...]
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vsetvli VL_E32, LEN32, e32, m4, ta, mu
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vadd.vv v16, v16, v20, v0.t
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j 2f
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1:
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// Set the number of blocks to process in this iteration. vl=VL_E32 is
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// the length in 32-bit words, i.e. 4 times the number of blocks.
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vsetvli VL_E32, LEN32, e32, m4, ta, mu
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// Increment the counters by the number of blocks processed in the
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// previous iteration.
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vadd.vx v16, v16, VL_BLOCKS, v0.t
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2:
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// Prepare the AES inputs into v24.
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vmv.v.v v24, v16
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vrev8.v v24, v24, v0.t // Convert counters back to big-endian.
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// Encrypt the AES inputs to create the next portion of the keystream.
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aes_encrypt v24, \keylen
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// XOR the data with the keystream.
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vsetvli t0, LEN, e8, m4, ta, ma
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vle8.v v20, (INP)
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vxor.vv v20, v20, v24
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vse8.v v20, (OUTP)
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// Advance the pointers and update the remaining length.
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add INP, INP, t0
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add OUTP, OUTP, t0
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sub LEN, LEN, t0
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sub LEN32, LEN32, VL_E32
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srli VL_BLOCKS, VL_E32, 2
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// Repeat if more data remains.
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bnez LEN, 1b
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// Update *IVP to contain the next counter.
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vsetivli zero, 4, e32, m1, ta, mu
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vadd.vx v16, v16, VL_BLOCKS, v0.t
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vrev8.v v16, v16, v0.t // Convert counters back to big-endian.
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vse32.v v16, (IVP)
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ret
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.endm
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// void aes_ctr32_crypt_zvkned_zvkb(const struct crypto_aes_ctx *key,
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// const u8 *in, u8 *out, size_t len,
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// u8 iv[16]);
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SYM_FUNC_START(aes_ctr32_crypt_zvkned_zvkb)
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aes_begin KEYP, 128f, 192f
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aes_ctr32_crypt 256
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128:
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aes_ctr32_crypt 128
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192:
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aes_ctr32_crypt 192
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SYM_FUNC_END(aes_ctr32_crypt_zvkned_zvkb)
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