555624c0d1
To prepare for completely separating the VGA console screen_info from the one used in EFI/sysfb, rename the vgacon instances and make them local as much as possible. ia64 and arm both have confurations with vgacon and efi, but the contents never overlaps because ia64 has no EFI framebuffer, and arm only has vga console on legacy platforms without EFI. Renaming these is required before the EFI screen_info can be moved into drivers/firmware. The ia64 vga console is actually registered in two places from setup_arch(), but one of them is wrong, so drop the one in pcdp.c and fix the one in setup.c to use the correct conditional. x86 has to keep them together, as the boot protocol is used to switch between VGA text console and framebuffer through the screen_info data. Acked-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Khalid Aziz <khalid@gonehiking.org> Acked-by: Helge Deller <deller@gmx.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20231009211845.3136536-7-arnd@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
238 lines
5.8 KiB
C
238 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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* Copyright (C) 2008 Dmitri Vorobiev
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*/
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/of_fdt.h>
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#include <linux/pci.h>
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#include <linux/screen_info.h>
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#include <linux/time.h>
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#include <linux/dma-map-ops.h> /* for dma_default_coherent */
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#include <asm/fw/fw.h>
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#include <asm/mips-cps.h>
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#include <asm/mips-boards/generic.h>
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#include <asm/mips-boards/malta.h>
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#include <asm/mips-boards/maltaint.h>
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#include <asm/dma.h>
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#include <asm/prom.h>
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#include <asm/traps.h>
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#ifdef CONFIG_VT
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#include <linux/console.h>
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#endif
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#define ROCIT_CONFIG_GEN0 0x1f403000
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#define ROCIT_CONFIG_GEN0_PCI_IOCU BIT(7)
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static struct resource standard_io_resources[] = {
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{
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.name = "dma1",
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.start = 0x00,
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.end = 0x1f,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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{
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.name = "timer",
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.start = 0x40,
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.end = 0x5f,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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{
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.name = "keyboard",
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.start = 0x60,
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.end = 0x6f,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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{
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.name = "dma page reg",
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.start = 0x80,
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.end = 0x8f,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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{
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.name = "dma2",
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.start = 0xc0,
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.end = 0xdf,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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};
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const char *get_system_type(void)
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{
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return "MIPS Malta";
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}
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#ifdef CONFIG_BLK_DEV_FD
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static void __init fd_activate(void)
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{
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/*
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* Activate Floppy Controller in the SMSC FDC37M817 Super I/O
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* Controller.
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* Done by YAMON 2.00 onwards
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*/
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/* Entering config state. */
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SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
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/* Activate floppy controller. */
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SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
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SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
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SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
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SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
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/* Exit config state. */
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SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
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}
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#endif
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static void __init plat_setup_iocoherency(void)
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{
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u32 cfg;
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if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
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if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
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BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
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pr_info("Enabled Bonito CPU coherency\n");
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dma_default_coherent = true;
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}
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if (strstr(fw_getcmdline(), "iobcuncached")) {
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BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
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BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
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~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
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BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
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pr_info("Disabled Bonito IOBC coherency\n");
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} else {
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BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
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BONITO_PCIMEMBASECFG |=
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(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
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BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
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pr_info("Enabled Bonito IOBC coherency\n");
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}
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} else if (mips_cps_numiocu(0) != 0) {
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/* Nothing special needs to be done to enable coherency */
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pr_info("CMP IOCU detected\n");
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cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
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if (cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)
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dma_default_coherent = true;
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else
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pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n");
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}
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if (dma_default_coherent)
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pr_info("Hardware DMA cache coherency enabled\n");
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else
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pr_info("Software DMA cache coherency enabled\n");
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}
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static void __init pci_clock_check(void)
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{
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unsigned int __iomem *jmpr_p =
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(unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
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int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
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static const int pciclocks[] __initconst = {
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33, 20, 25, 30, 12, 16, 37, 10
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};
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int pciclock = pciclocks[jmpr];
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char *optptr, *argptr = fw_getcmdline();
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/*
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* If user passed a pci_clock= option, don't tack on another one
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*/
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optptr = strstr(argptr, "pci_clock=");
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if (optptr && (optptr == argptr || optptr[-1] == ' '))
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return;
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if (pciclock != 33) {
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pr_warn("WARNING: PCI clock is %dMHz, setting pci_clock\n",
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pciclock);
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argptr += strlen(argptr);
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sprintf(argptr, " pci_clock=%d", pciclock);
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if (pciclock < 20 || pciclock > 66)
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pr_warn("WARNING: IDE timing calculations will be "
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"incorrect\n");
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}
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}
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#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
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static void __init screen_info_setup(void)
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{
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static struct screen_info si = {
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.orig_x = 0,
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.orig_y = 25,
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.ext_mem_k = 0,
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.orig_video_page = 0,
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.orig_video_mode = 0,
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.orig_video_cols = 80,
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.unused2 = 0,
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.orig_video_ega_bx = 0,
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.unused3 = 0,
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.orig_video_lines = 25,
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.orig_video_isVGA = VIDEO_TYPE_VGAC,
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.orig_video_points = 16
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};
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vgacon_register_screen(&si);
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}
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#endif
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static void __init bonito_quirks_setup(void)
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{
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char *argptr;
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argptr = fw_getcmdline();
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if (strstr(argptr, "debug")) {
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BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
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pr_info("Enabled Bonito debug mode\n");
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} else
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BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
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}
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void __init *plat_get_fdt(void)
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{
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return (void *)__dtb_start;
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}
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void __init plat_mem_setup(void)
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{
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unsigned int i;
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void *fdt = plat_get_fdt();
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fdt = malta_dt_shim(fdt);
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__dt_setup_arch(fdt);
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if (IS_ENABLED(CONFIG_EVA))
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/* EVA has already been configured in mach-malta/kernel-init.h */
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pr_info("Enhanced Virtual Addressing (EVA) activated\n");
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mips_pcibios_init();
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/* Request I/O space for devices used on the Malta board. */
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for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
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request_resource(&ioport_resource, standard_io_resources+i);
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/*
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* Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
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*/
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enable_dma(4);
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if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO)
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bonito_quirks_setup();
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plat_setup_iocoherency();
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pci_clock_check();
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#ifdef CONFIG_BLK_DEV_FD
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fd_activate();
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#endif
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#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
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screen_info_setup();
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#endif
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}
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