16df55ce10
Remove all kernel-doc notation in arch/mips/cavium-octeon/executive/. This removes dozens of kernel-doc warnings. Most of these functions are static and don't need to be documented with kernel-doc. The function comments are still present for anyone who wants to read them. These files are part of the OCTEON SDK so presumably they are documented there as well. arch/mips/cavium-octeon/executive/cvmx-bootmem.c:61: warning: Function parameter or member 'addr' not described in 'CVMX_BOOTMEM_NAMED_GET_FIELD' arch/mips/cavium-octeon/executive/cvmx-bootmem.c:61: warning: Function parameter or member 'field' not described in 'CVMX_BOOTMEM_NAMED_GET_FIELD' arch/mips/cavium-octeon/executive/cvmx-bootmem.c:61: warning: expecting prototype for This macro returns a member of the(). Prototype was for CVMX_BOOTMEM_NAMED_GET_FIELD() instead arch/mips/cavium-octeon/executive/cvmx-bootmem.c:77: warning: Function parameter or member 'base' not described in '__cvmx_bootmem_desc_get' arch/mips/cavium-octeon/executive/cvmx-bootmem.c:77: warning: Function parameter or member 'offset' not described in '__cvmx_bootmem_desc_get' arch/mips/cavium-octeon/executive/cvmx-bootmem.c:77: warning: Function parameter or member 'size' not described in '__cvmx_bootmem_desc_get' arch/mips/cavium-octeon/executive/cvmx-bootmem.c:77: warning: expecting prototype for This function is the implementation of the get macros defined(). Prototype was for __cvmx_bootmem_desc_get() instead arch/mips/cavium-octeon/executive/cvmx-bootmem.c:133: warning: expecting prototype for Allocate a block of memory from the free list that was(). Prototype was for cvmx_bootmem_alloc_range() instead arch/mips/cavium-octeon/executive/cvmx-bootmem.c:554: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Finds a named memory block by name. arch/mips/cavium-octeon/executive/cvmx-bootmem.c:661: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Frees a named block. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/mips/cavium-octeon/executive/cvmx-helper-board.c:64: warning: expecting prototype for Return the MII PHY address associated with the given IPD(). Prototype was for cvmx_helper_board_get_mii_address() instead arch/mips/cavium-octeon/executive/cvmx-helper-board.c:211: warning: expecting prototype for This function is the board specific method of determining an(). Prototype was for __cvmx_helper_board_link_get() instead arch/mips/cavium-octeon/executive/cvmx-helper-board.c:278: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * This function is called by cvmx_helper_interface_probe() after it arch/mips/cavium-octeon/executive/cvmx-helper-board.c:324: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Get the clock type used for the USB block based on board type. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/mips/cavium-octeon/executive/cvmx-spi.c:77: warning: expecting prototype for Get current SPI4 initialization callbacks(). Prototype was for cvmx_spi_get_callbacks() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:87: warning: expecting prototype for Set new SPI4 initialization callbacks(). Prototype was for cvmx_spi_set_callbacks() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:92: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Initialize and start the SPI interface. arch/mips/cavium-octeon/executive/cvmx-spi.c:151: warning: expecting prototype for This routine restarts the SPI interface after it has lost synchronization(). Prototype was for cvmx_spi_restart_interface() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:196: warning: expecting prototype for Callback to perform SPI4 reset(). Prototype was for cvmx_spi_reset_cb() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:313: warning: expecting prototype for Callback to setup calendar and miscellaneous settings before clock detection(). Prototype was for cvmx_spi_calendar_setup_cb() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:431: warning: expecting prototype for Callback to perform clock detection(). Prototype was for cvmx_spi_clock_detect_cb() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:509: warning: expecting prototype for Callback to perform link training(). Prototype was for cvmx_spi_training_cb() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:578: warning: expecting prototype for Callback to perform calendar data synchronization(). Prototype was for cvmx_spi_calendar_sync_cb() instead arch/mips/cavium-octeon/executive/cvmx-spi.c:634: warning: expecting prototype for Callback to handle interface up(). Prototype was for cvmx_spi_interface_up_cb() instead ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c:67: warning: expecting prototype for Probe a XAUI interface and determine the number of ports(). Prototype was for __cvmx_helper_xaui_probe() instead arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c:106: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Bringup and enable a XAUI interface. After this call packet arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c:253: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Return the link state of an IPD/PKO port as returned by arch/mips/cavium-octeon/executive/cvmx-helper-xaui.c:292: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Configure an IPD/PKO port for the specified link state. This ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/mips/cavium-octeon/executive/cvmx-pko.c:43: warning: Function parameter or member 'interface' not described in '__cvmx_pko_int' arch/mips/cavium-octeon/executive/cvmx-pko.c:43: warning: Function parameter or member 'index' not described in '__cvmx_pko_int' arch/mips/cavium-octeon/executive/cvmx-pko.c:43: warning: expecting prototype for Internal state of packet output(). Prototype was for __cvmx_pko_int() instead arch/mips/cavium-octeon/executive/cvmx-pko.c:186: warning: expecting prototype for Call before any other calls to initialize the packet(). Prototype was for cvmx_pko_initialize_global() instead arch/mips/cavium-octeon/executive/cvmx-pko.c:241: warning: expecting prototype for This function does per(). Prototype was for cvmx_pko_initialize_local() instead arch/mips/cavium-octeon/executive/cvmx-pko.c:247: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Enables the packet output hardware. It must already be arch/mips/cavium-octeon/executive/cvmx-pko.c:270: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Disables the packet output. Does not affect any configuration. arch/mips/cavium-octeon/executive/cvmx-pko.c:282: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Reset the packet output. arch/mips/cavium-octeon/executive/cvmx-pko.c:293: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Shutdown and free resources required by packet output. arch/mips/cavium-octeon/executive/cvmx-pko.c:324: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Configure a output port and the associated queues for use. arch/mips/cavium-octeon/executive/cvmx-pko.c:555: warning: expecting prototype for Show map of ports(). Prototype was for cvmx_pko_show_queue_map() instead arch/mips/cavium-octeon/executive/cvmx-pko.c:577: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Rate limit a PKO port to a max packets/sec. This function is only arch/mips/cavium-octeon/executive/cvmx-pko.c:610: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Rate limit a PKO port to a max bits/sec. This function is only ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c:49: warning: cannot understand function prototype: '__cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptr; ' arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c:53: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Initialize the Global queue state pointer. arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c:101: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Initialize a command queue for use. The initial FPA buffer is arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c:199: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Shutdown a queue a free it's command buffers to the FPA. The arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c:235: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Return the number of command words pending in the queue. This arch/mips/cavium-octeon/executive/cvmx-cmd-queue.c:291: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Return the command buffer to be written to. The purpose of this ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c:53: warning: expecting prototype for Probe RGMII ports and determine the number present(). Prototype was for __cvmx_helper_rgmii_probe() instead arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c:92: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Put an RGMII interface in loopback mode. Internal packets sent arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c:135: warning: expecting prototype for Workaround ASX setup errata with CN38XX pass1(). Prototype was for __cvmx_helper_errata_asx_pass1() instead arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c:152: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Configure all of the ASX, GMX, and PKO registers required arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c:255: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Return the link state of an IPD/PKO port as returned by arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c:284: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Configure an IPD/PKO port for the specified link state. This -- arch/mips/cavium-octeon/executive/cvmx-l2c.c:768: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Return log base 2 of the number of sets in the L2 cache arch/mips/cavium-octeon/executive/cvmx-l2c.c:861: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Flush a line from the L2 cache Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Aditya Srivastava <yashsri421@gmail.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@vger.kernel.org Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
452 lines
15 KiB
C
452 lines
15 KiB
C
/***********************license start***************
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* Author: Cavium Networks
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*
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* Contact: support@caviumnetworks.com
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* This file is part of the OCTEON SDK
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*
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* Copyright (C) 2003-2018 Cavium, Inc.
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful, but
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* AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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* NONINFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this file; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* or visit http://www.gnu.org/licenses/.
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*
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* This file may also be available under a different license from Cavium.
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* Contact Cavium Networks for more information
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***********************license end**************************************/
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/*
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* Functions for RGMII/GMII/MII initialization, configuration,
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* and monitoring.
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*/
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#include <asm/octeon/octeon.h>
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#include <asm/octeon/cvmx-config.h>
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#include <asm/octeon/cvmx-pko.h>
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#include <asm/octeon/cvmx-helper.h>
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#include <asm/octeon/cvmx-helper-board.h>
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#include <asm/octeon/cvmx-npi-defs.h>
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#include <asm/octeon/cvmx-gmxx-defs.h>
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#include <asm/octeon/cvmx-asxx-defs.h>
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#include <asm/octeon/cvmx-dbg-defs.h>
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/*
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* Probe RGMII ports and determine the number present
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*
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* @interface: Interface to probe
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*
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* Returns Number of RGMII/GMII/MII ports (0-4).
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*/
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int __cvmx_helper_rgmii_probe(int interface)
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{
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int num_ports = 0;
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union cvmx_gmxx_inf_mode mode;
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mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
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if (mode.s.type) {
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if (OCTEON_IS_MODEL(OCTEON_CN38XX)
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|| OCTEON_IS_MODEL(OCTEON_CN58XX)) {
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cvmx_dprintf("ERROR: RGMII initialize called in "
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"SPI interface\n");
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} else if (OCTEON_IS_MODEL(OCTEON_CN31XX)
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|| OCTEON_IS_MODEL(OCTEON_CN30XX)
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|| OCTEON_IS_MODEL(OCTEON_CN50XX)) {
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/*
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* On these chips "type" says we're in
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* GMII/MII mode. This limits us to 2 ports
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*/
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num_ports = 2;
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} else {
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cvmx_dprintf("ERROR: Unsupported Octeon model in %s\n",
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__func__);
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}
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} else {
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if (OCTEON_IS_MODEL(OCTEON_CN38XX)
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|| OCTEON_IS_MODEL(OCTEON_CN58XX)) {
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num_ports = 4;
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} else if (OCTEON_IS_MODEL(OCTEON_CN31XX)
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|| OCTEON_IS_MODEL(OCTEON_CN30XX)
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|| OCTEON_IS_MODEL(OCTEON_CN50XX)) {
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num_ports = 3;
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} else {
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cvmx_dprintf("ERROR: Unsupported Octeon model in %s\n",
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__func__);
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}
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}
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return num_ports;
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}
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/*
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* Put an RGMII interface in loopback mode. Internal packets sent
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* out will be received back again on the same port. Externally
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* received packets will echo back out.
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*
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* @port: IPD port number to loop.
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*/
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void cvmx_helper_rgmii_internal_loopback(int port)
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{
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int interface = (port >> 4) & 1;
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int index = port & 0xf;
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uint64_t tmp;
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union cvmx_gmxx_prtx_cfg gmx_cfg;
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gmx_cfg.u64 = 0;
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gmx_cfg.s.duplex = 1;
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gmx_cfg.s.slottime = 1;
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gmx_cfg.s.speed = 1;
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cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1);
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cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
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cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
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cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
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tmp = cvmx_read_csr(CVMX_ASXX_PRT_LOOP(interface));
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cvmx_write_csr(CVMX_ASXX_PRT_LOOP(interface), (1 << index) | tmp);
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tmp = cvmx_read_csr(CVMX_ASXX_TX_PRT_EN(interface));
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cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface), (1 << index) | tmp);
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tmp = cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface));
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cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface), (1 << index) | tmp);
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gmx_cfg.s.en = 1;
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cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
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}
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/*
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* Workaround ASX setup errata with CN38XX pass1
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*
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* @interface: Interface to setup
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* @port: Port to setup (0..3)
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* @cpu_clock_hz:
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* Chip frequency in Hertz
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*
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* Returns Zero on success, negative on failure
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*/
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static int __cvmx_helper_errata_asx_pass1(int interface, int port,
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int cpu_clock_hz)
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{
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/* Set hi water mark as per errata GMX-4 */
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if (cpu_clock_hz >= 325000000 && cpu_clock_hz < 375000000)
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cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 12);
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else if (cpu_clock_hz >= 375000000 && cpu_clock_hz < 437000000)
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cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 11);
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else if (cpu_clock_hz >= 437000000 && cpu_clock_hz < 550000000)
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cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 10);
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else if (cpu_clock_hz >= 550000000 && cpu_clock_hz < 687000000)
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cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 9);
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else
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cvmx_dprintf("Illegal clock frequency (%d). "
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"CVMX_ASXX_TX_HI_WATERX not set\n", cpu_clock_hz);
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return 0;
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}
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/*
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* Configure all of the ASX, GMX, and PKO registers required
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* to get RGMII to function on the supplied interface.
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*
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* @interface: PKO Interface to configure (0 or 1)
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*
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* Returns Zero on success
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*/
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int __cvmx_helper_rgmii_enable(int interface)
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{
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int num_ports = cvmx_helper_ports_on_interface(interface);
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int port;
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struct cvmx_sysinfo *sys_info_ptr = cvmx_sysinfo_get();
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union cvmx_gmxx_inf_mode mode;
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union cvmx_asxx_tx_prt_en asx_tx;
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union cvmx_asxx_rx_prt_en asx_rx;
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mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
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if (mode.s.en == 0)
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return -1;
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if ((OCTEON_IS_MODEL(OCTEON_CN38XX) ||
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OCTEON_IS_MODEL(OCTEON_CN58XX)) && mode.s.type == 1)
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/* Ignore SPI interfaces */
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return -1;
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/* Configure the ASX registers needed to use the RGMII ports */
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asx_tx.u64 = 0;
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asx_tx.s.prt_en = cvmx_build_mask(num_ports);
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cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface), asx_tx.u64);
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asx_rx.u64 = 0;
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asx_rx.s.prt_en = cvmx_build_mask(num_ports);
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cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface), asx_rx.u64);
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/* Configure the GMX registers needed to use the RGMII ports */
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for (port = 0; port < num_ports; port++) {
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/* Setting of CVMX_GMXX_TXX_THRESH has been moved to
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__cvmx_helper_setup_gmx() */
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if (cvmx_octeon_is_pass1())
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__cvmx_helper_errata_asx_pass1(interface, port,
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sys_info_ptr->
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cpu_clock_hz);
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else {
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/*
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* Configure more flexible RGMII preamble
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* checking. Pass 1 doesn't support this
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* feature.
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*/
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union cvmx_gmxx_rxx_frm_ctl frm_ctl;
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frm_ctl.u64 =
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cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL
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(port, interface));
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/* New field, so must be compile time */
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frm_ctl.s.pre_free = 1;
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cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(port, interface),
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frm_ctl.u64);
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}
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/*
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* Each pause frame transmitted will ask for about 10M
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* bit times before resume. If buffer space comes
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* available before that time has expired, an XON
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* pause frame (0 time) will be transmitted to restart
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* the flow.
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*/
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cvmx_write_csr(CVMX_GMXX_TXX_PAUSE_PKT_TIME(port, interface),
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20000);
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cvmx_write_csr(CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL
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(port, interface), 19000);
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if (OCTEON_IS_MODEL(OCTEON_CN50XX)) {
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cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface),
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16);
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cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, interface),
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16);
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} else {
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cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface),
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24);
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cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, interface),
|
|
24);
|
|
}
|
|
}
|
|
|
|
__cvmx_helper_setup_gmx(interface, num_ports);
|
|
|
|
/* enable the ports now */
|
|
for (port = 0; port < num_ports; port++) {
|
|
union cvmx_gmxx_prtx_cfg gmx_cfg;
|
|
|
|
gmx_cfg.u64 =
|
|
cvmx_read_csr(CVMX_GMXX_PRTX_CFG(port, interface));
|
|
gmx_cfg.s.en = 1;
|
|
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(port, interface),
|
|
gmx_cfg.u64);
|
|
}
|
|
__cvmx_interrupt_asxx_enable(interface);
|
|
__cvmx_interrupt_gmxx_enable(interface);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Return the link state of an IPD/PKO port as returned by
|
|
* auto negotiation. The result of this function may not match
|
|
* Octeon's link config if auto negotiation has changed since
|
|
* the last call to cvmx_helper_link_set().
|
|
*
|
|
* @ipd_port: IPD/PKO port to query
|
|
*
|
|
* Returns Link state
|
|
*/
|
|
union cvmx_helper_link_info __cvmx_helper_rgmii_link_get(int ipd_port)
|
|
{
|
|
int interface = cvmx_helper_get_interface_num(ipd_port);
|
|
int index = cvmx_helper_get_interface_index_num(ipd_port);
|
|
union cvmx_asxx_prt_loop asxx_prt_loop;
|
|
|
|
asxx_prt_loop.u64 = cvmx_read_csr(CVMX_ASXX_PRT_LOOP(interface));
|
|
if (asxx_prt_loop.s.int_loop & (1 << index)) {
|
|
/* Force 1Gbps full duplex on internal loopback */
|
|
union cvmx_helper_link_info result;
|
|
result.u64 = 0;
|
|
result.s.full_duplex = 1;
|
|
result.s.link_up = 1;
|
|
result.s.speed = 1000;
|
|
return result;
|
|
} else
|
|
return __cvmx_helper_board_link_get(ipd_port);
|
|
}
|
|
|
|
/*
|
|
* Configure an IPD/PKO port for the specified link state. This
|
|
* function does not influence auto negotiation at the PHY level.
|
|
* The passed link state must always match the link state returned
|
|
* by cvmx_helper_link_get().
|
|
*
|
|
* @ipd_port: IPD/PKO port to configure
|
|
* @link_info: The new link state
|
|
*
|
|
* Returns Zero on success, negative on failure
|
|
*/
|
|
int __cvmx_helper_rgmii_link_set(int ipd_port,
|
|
union cvmx_helper_link_info link_info)
|
|
{
|
|
int result = 0;
|
|
int interface = cvmx_helper_get_interface_num(ipd_port);
|
|
int index = cvmx_helper_get_interface_index_num(ipd_port);
|
|
union cvmx_gmxx_prtx_cfg original_gmx_cfg;
|
|
union cvmx_gmxx_prtx_cfg new_gmx_cfg;
|
|
union cvmx_pko_mem_queue_qos pko_mem_queue_qos;
|
|
union cvmx_pko_mem_queue_qos pko_mem_queue_qos_save[16];
|
|
union cvmx_gmxx_tx_ovr_bp gmx_tx_ovr_bp;
|
|
union cvmx_gmxx_tx_ovr_bp gmx_tx_ovr_bp_save;
|
|
int i;
|
|
|
|
/* Ignore speed sets in the simulator */
|
|
if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
|
|
return 0;
|
|
|
|
/* Read the current settings so we know the current enable state */
|
|
original_gmx_cfg.u64 =
|
|
cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
|
|
new_gmx_cfg = original_gmx_cfg;
|
|
|
|
/* Disable the lowest level RX */
|
|
cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface),
|
|
cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface)) &
|
|
~(1 << index));
|
|
|
|
memset(pko_mem_queue_qos_save, 0, sizeof(pko_mem_queue_qos_save));
|
|
/* Disable all queues so that TX should become idle */
|
|
for (i = 0; i < cvmx_pko_get_num_queues(ipd_port); i++) {
|
|
int queue = cvmx_pko_get_base_queue(ipd_port) + i;
|
|
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue);
|
|
pko_mem_queue_qos.u64 = cvmx_read_csr(CVMX_PKO_MEM_QUEUE_QOS);
|
|
pko_mem_queue_qos.s.pid = ipd_port;
|
|
pko_mem_queue_qos.s.qid = queue;
|
|
pko_mem_queue_qos_save[i] = pko_mem_queue_qos;
|
|
pko_mem_queue_qos.s.qos_mask = 0;
|
|
cvmx_write_csr(CVMX_PKO_MEM_QUEUE_QOS, pko_mem_queue_qos.u64);
|
|
}
|
|
|
|
/* Disable backpressure */
|
|
gmx_tx_ovr_bp.u64 = cvmx_read_csr(CVMX_GMXX_TX_OVR_BP(interface));
|
|
gmx_tx_ovr_bp_save = gmx_tx_ovr_bp;
|
|
gmx_tx_ovr_bp.s.bp &= ~(1 << index);
|
|
gmx_tx_ovr_bp.s.en |= 1 << index;
|
|
cvmx_write_csr(CVMX_GMXX_TX_OVR_BP(interface), gmx_tx_ovr_bp.u64);
|
|
cvmx_read_csr(CVMX_GMXX_TX_OVR_BP(interface));
|
|
|
|
/*
|
|
* Poll the GMX state machine waiting for it to become
|
|
* idle. Preferably we should only change speed when it is
|
|
* idle. If it doesn't become idle we will still do the speed
|
|
* change, but there is a slight chance that GMX will
|
|
* lockup.
|
|
*/
|
|
cvmx_write_csr(CVMX_NPI_DBG_SELECT,
|
|
interface * 0x800 + index * 0x100 + 0x880);
|
|
CVMX_WAIT_FOR_FIELD64(CVMX_DBG_DATA, union cvmx_dbg_data, data & 7,
|
|
==, 0, 10000);
|
|
CVMX_WAIT_FOR_FIELD64(CVMX_DBG_DATA, union cvmx_dbg_data, data & 0xf,
|
|
==, 0, 10000);
|
|
|
|
/* Disable the port before we make any changes */
|
|
new_gmx_cfg.s.en = 0;
|
|
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
|
|
cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
|
|
|
|
/* Set full/half duplex */
|
|
if (cvmx_octeon_is_pass1())
|
|
/* Half duplex is broken for 38XX Pass 1 */
|
|
new_gmx_cfg.s.duplex = 1;
|
|
else if (!link_info.s.link_up)
|
|
/* Force full duplex on down links */
|
|
new_gmx_cfg.s.duplex = 1;
|
|
else
|
|
new_gmx_cfg.s.duplex = link_info.s.full_duplex;
|
|
|
|
/* Set the link speed. Anything unknown is set to 1Gbps */
|
|
if (link_info.s.speed == 10) {
|
|
new_gmx_cfg.s.slottime = 0;
|
|
new_gmx_cfg.s.speed = 0;
|
|
} else if (link_info.s.speed == 100) {
|
|
new_gmx_cfg.s.slottime = 0;
|
|
new_gmx_cfg.s.speed = 0;
|
|
} else {
|
|
new_gmx_cfg.s.slottime = 1;
|
|
new_gmx_cfg.s.speed = 1;
|
|
}
|
|
|
|
/* Adjust the clocks */
|
|
if (link_info.s.speed == 10) {
|
|
cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 50);
|
|
cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
|
|
cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
|
|
} else if (link_info.s.speed == 100) {
|
|
cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 5);
|
|
cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
|
|
cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
|
|
} else {
|
|
cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1);
|
|
cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
|
|
cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
|
|
}
|
|
|
|
if (OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)) {
|
|
if ((link_info.s.speed == 10) || (link_info.s.speed == 100)) {
|
|
union cvmx_gmxx_inf_mode mode;
|
|
mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
|
|
|
|
/*
|
|
* Port .en .type .p0mii Configuration
|
|
* ---- --- ----- ------ -----------------------------------------
|
|
* X 0 X X All links are disabled.
|
|
* 0 1 X 0 Port 0 is RGMII
|
|
* 0 1 X 1 Port 0 is MII
|
|
* 1 1 0 X Ports 1 and 2 are configured as RGMII ports.
|
|
* 1 1 1 X Port 1: GMII/MII; Port 2: disabled. GMII or
|
|
* MII port is selected by GMX_PRT1_CFG[SPEED].
|
|
*/
|
|
|
|
/* In MII mode, CLK_CNT = 1. */
|
|
if (((index == 0) && (mode.s.p0mii == 1))
|
|
|| ((index != 0) && (mode.s.type == 1))) {
|
|
cvmx_write_csr(CVMX_GMXX_TXX_CLK
|
|
(index, interface), 1);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Do a read to make sure all setup stuff is complete */
|
|
cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
|
|
|
|
/* Save the new GMX setting without enabling the port */
|
|
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
|
|
|
|
/* Enable the lowest level RX */
|
|
cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface),
|
|
cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface)) | (1 <<
|
|
index));
|
|
|
|
/* Re-enable the TX path */
|
|
for (i = 0; i < cvmx_pko_get_num_queues(ipd_port); i++) {
|
|
int queue = cvmx_pko_get_base_queue(ipd_port) + i;
|
|
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue);
|
|
cvmx_write_csr(CVMX_PKO_MEM_QUEUE_QOS,
|
|
pko_mem_queue_qos_save[i].u64);
|
|
}
|
|
|
|
/* Restore backpressure */
|
|
cvmx_write_csr(CVMX_GMXX_TX_OVR_BP(interface), gmx_tx_ovr_bp_save.u64);
|
|
|
|
/* Restore the GMX enable state. Port config is complete */
|
|
new_gmx_cfg.s.en = original_gmx_cfg.s.en;
|
|
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
|
|
|
|
return result;
|
|
}
|