f3456b9fd2
ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are affected by silicon errata #1742098 and #1655431, respectively, where the second instruction of a AES instruction pair may execute twice if an interrupt is taken right after the first instruction consumes an input register of which a single 32-bit lane has been updated the last time it was modified. This is not such a rare occurrence as it may seem: in counter mode, only the least significant 32-bit word is incremented in the absence of a carry, which makes our counter mode implementation susceptible to these errata. So let's shuffle the counter assignments around a bit so that the most recent updates when the AES instruction pair executes are 128-bit wide. [0] ARM-EPM-049219 v23 Cortex-A57 MPCore Software Developers Errata Notice [1] ARM-EPM-012079 v11.0 Cortex-A72 MPCore Software Developers Errata Notice Cc: <stable@vger.kernel.org> # v5.4+ Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
714 lines
15 KiB
ArmAsm
714 lines
15 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* aes-ce-core.S - AES in CBC/CTR/XTS mode using ARMv8 Crypto Extensions
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*
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* Copyright (C) 2015 Linaro Ltd <ard.biesheuvel@linaro.org>
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.text
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.arch armv8-a
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.fpu crypto-neon-fp-armv8
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.align 3
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.macro enc_round, state, key
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aese.8 \state, \key
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aesmc.8 \state, \state
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.endm
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.macro dec_round, state, key
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aesd.8 \state, \key
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aesimc.8 \state, \state
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.endm
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.macro enc_dround, key1, key2
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enc_round q0, \key1
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enc_round q0, \key2
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.endm
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.macro dec_dround, key1, key2
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dec_round q0, \key1
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dec_round q0, \key2
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.endm
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.macro enc_fround, key1, key2, key3
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enc_round q0, \key1
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aese.8 q0, \key2
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veor q0, q0, \key3
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.endm
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.macro dec_fround, key1, key2, key3
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dec_round q0, \key1
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aesd.8 q0, \key2
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veor q0, q0, \key3
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.endm
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.macro enc_dround_4x, key1, key2
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enc_round q0, \key1
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enc_round q1, \key1
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enc_round q2, \key1
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enc_round q3, \key1
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enc_round q0, \key2
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enc_round q1, \key2
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enc_round q2, \key2
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enc_round q3, \key2
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.endm
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.macro dec_dround_4x, key1, key2
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dec_round q0, \key1
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dec_round q1, \key1
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dec_round q2, \key1
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dec_round q3, \key1
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dec_round q0, \key2
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dec_round q1, \key2
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dec_round q2, \key2
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dec_round q3, \key2
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.endm
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.macro enc_fround_4x, key1, key2, key3
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enc_round q0, \key1
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enc_round q1, \key1
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enc_round q2, \key1
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enc_round q3, \key1
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aese.8 q0, \key2
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aese.8 q1, \key2
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aese.8 q2, \key2
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aese.8 q3, \key2
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veor q0, q0, \key3
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veor q1, q1, \key3
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veor q2, q2, \key3
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veor q3, q3, \key3
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.endm
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.macro dec_fround_4x, key1, key2, key3
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dec_round q0, \key1
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dec_round q1, \key1
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dec_round q2, \key1
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dec_round q3, \key1
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aesd.8 q0, \key2
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aesd.8 q1, \key2
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aesd.8 q2, \key2
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aesd.8 q3, \key2
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veor q0, q0, \key3
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veor q1, q1, \key3
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veor q2, q2, \key3
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veor q3, q3, \key3
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.endm
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.macro do_block, dround, fround
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cmp r3, #12 @ which key size?
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vld1.32 {q10-q11}, [ip]!
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\dround q8, q9
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vld1.32 {q12-q13}, [ip]!
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\dround q10, q11
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vld1.32 {q10-q11}, [ip]!
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\dround q12, q13
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vld1.32 {q12-q13}, [ip]!
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\dround q10, q11
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blo 0f @ AES-128: 10 rounds
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vld1.32 {q10-q11}, [ip]!
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\dround q12, q13
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beq 1f @ AES-192: 12 rounds
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vld1.32 {q12-q13}, [ip]
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\dround q10, q11
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0: \fround q12, q13, q14
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bx lr
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1: \fround q10, q11, q14
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bx lr
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.endm
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/*
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* Internal, non-AAPCS compliant functions that implement the core AES
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* transforms. These should preserve all registers except q0 - q2 and ip
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* Arguments:
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* q0 : first in/output block
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* q1 : second in/output block (_4x version only)
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* q2 : third in/output block (_4x version only)
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* q3 : fourth in/output block (_4x version only)
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* q8 : first round key
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* q9 : secound round key
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* q14 : final round key
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* r2 : address of round key array
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* r3 : number of rounds
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*/
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.align 6
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aes_encrypt:
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add ip, r2, #32 @ 3rd round key
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.Laes_encrypt_tweak:
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do_block enc_dround, enc_fround
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ENDPROC(aes_encrypt)
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.align 6
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aes_decrypt:
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add ip, r2, #32 @ 3rd round key
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do_block dec_dround, dec_fround
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ENDPROC(aes_decrypt)
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.align 6
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aes_encrypt_4x:
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add ip, r2, #32 @ 3rd round key
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do_block enc_dround_4x, enc_fround_4x
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ENDPROC(aes_encrypt_4x)
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.align 6
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aes_decrypt_4x:
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add ip, r2, #32 @ 3rd round key
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do_block dec_dround_4x, dec_fround_4x
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ENDPROC(aes_decrypt_4x)
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.macro prepare_key, rk, rounds
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add ip, \rk, \rounds, lsl #4
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vld1.32 {q8-q9}, [\rk] @ load first 2 round keys
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vld1.32 {q14}, [ip] @ load last round key
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.endm
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/*
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* aes_ecb_encrypt(u8 out[], u8 const in[], u32 const rk[], int rounds,
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* int blocks)
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* aes_ecb_decrypt(u8 out[], u8 const in[], u32 const rk[], int rounds,
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* int blocks)
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*/
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ENTRY(ce_aes_ecb_encrypt)
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push {r4, lr}
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ldr r4, [sp, #8]
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prepare_key r2, r3
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.Lecbencloop4x:
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subs r4, r4, #4
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bmi .Lecbenc1x
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vld1.8 {q0-q1}, [r1]!
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vld1.8 {q2-q3}, [r1]!
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bl aes_encrypt_4x
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2-q3}, [r0]!
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b .Lecbencloop4x
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.Lecbenc1x:
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adds r4, r4, #4
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beq .Lecbencout
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.Lecbencloop:
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vld1.8 {q0}, [r1]!
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bl aes_encrypt
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vst1.8 {q0}, [r0]!
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subs r4, r4, #1
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bne .Lecbencloop
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.Lecbencout:
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pop {r4, pc}
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ENDPROC(ce_aes_ecb_encrypt)
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ENTRY(ce_aes_ecb_decrypt)
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push {r4, lr}
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ldr r4, [sp, #8]
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prepare_key r2, r3
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.Lecbdecloop4x:
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subs r4, r4, #4
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bmi .Lecbdec1x
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vld1.8 {q0-q1}, [r1]!
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vld1.8 {q2-q3}, [r1]!
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bl aes_decrypt_4x
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2-q3}, [r0]!
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b .Lecbdecloop4x
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.Lecbdec1x:
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adds r4, r4, #4
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beq .Lecbdecout
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.Lecbdecloop:
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vld1.8 {q0}, [r1]!
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bl aes_decrypt
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vst1.8 {q0}, [r0]!
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subs r4, r4, #1
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bne .Lecbdecloop
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.Lecbdecout:
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pop {r4, pc}
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ENDPROC(ce_aes_ecb_decrypt)
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/*
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* aes_cbc_encrypt(u8 out[], u8 const in[], u32 const rk[], int rounds,
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* int blocks, u8 iv[])
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* aes_cbc_decrypt(u8 out[], u8 const in[], u32 const rk[], int rounds,
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* int blocks, u8 iv[])
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*/
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ENTRY(ce_aes_cbc_encrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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vld1.8 {q0}, [r5]
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prepare_key r2, r3
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.Lcbcencloop:
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vld1.8 {q1}, [r1]! @ get next pt block
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veor q0, q0, q1 @ ..and xor with iv
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bl aes_encrypt
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vst1.8 {q0}, [r0]!
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subs r4, r4, #1
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bne .Lcbcencloop
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vst1.8 {q0}, [r5]
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pop {r4-r6, pc}
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ENDPROC(ce_aes_cbc_encrypt)
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ENTRY(ce_aes_cbc_decrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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vld1.8 {q15}, [r5] @ keep iv in q15
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prepare_key r2, r3
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.Lcbcdecloop4x:
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subs r4, r4, #4
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bmi .Lcbcdec1x
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vld1.8 {q0-q1}, [r1]!
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vld1.8 {q2-q3}, [r1]!
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vmov q4, q0
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vmov q5, q1
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vmov q6, q2
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vmov q7, q3
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bl aes_decrypt_4x
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veor q0, q0, q15
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veor q1, q1, q4
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veor q2, q2, q5
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veor q3, q3, q6
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vmov q15, q7
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2-q3}, [r0]!
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b .Lcbcdecloop4x
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.Lcbcdec1x:
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adds r4, r4, #4
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beq .Lcbcdecout
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vmov q6, q14 @ preserve last round key
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.Lcbcdecloop:
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vld1.8 {q0}, [r1]! @ get next ct block
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veor q14, q15, q6 @ combine prev ct with last key
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vmov q15, q0
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bl aes_decrypt
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vst1.8 {q0}, [r0]!
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subs r4, r4, #1
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bne .Lcbcdecloop
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.Lcbcdecout:
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vst1.8 {q15}, [r5] @ keep iv in q15
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pop {r4-r6, pc}
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ENDPROC(ce_aes_cbc_decrypt)
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/*
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* ce_aes_cbc_cts_encrypt(u8 out[], u8 const in[], u32 const rk[],
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* int rounds, int bytes, u8 const iv[])
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* ce_aes_cbc_cts_decrypt(u8 out[], u8 const in[], u32 const rk[],
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* int rounds, int bytes, u8 const iv[])
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*/
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ENTRY(ce_aes_cbc_cts_encrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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movw ip, :lower16:.Lcts_permute_table
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movt ip, :upper16:.Lcts_permute_table
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sub r4, r4, #16
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add lr, ip, #32
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add ip, ip, r4
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sub lr, lr, r4
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vld1.8 {q5}, [ip]
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vld1.8 {q6}, [lr]
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add ip, r1, r4
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vld1.8 {q0}, [r1] @ overlapping loads
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vld1.8 {q3}, [ip]
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vld1.8 {q1}, [r5] @ get iv
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prepare_key r2, r3
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veor q0, q0, q1 @ xor with iv
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bl aes_encrypt
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vtbl.8 d4, {d0-d1}, d10
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vtbl.8 d5, {d0-d1}, d11
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vtbl.8 d2, {d6-d7}, d12
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vtbl.8 d3, {d6-d7}, d13
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veor q0, q0, q1
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bl aes_encrypt
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add r4, r0, r4
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vst1.8 {q2}, [r4] @ overlapping stores
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vst1.8 {q0}, [r0]
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pop {r4-r6, pc}
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ENDPROC(ce_aes_cbc_cts_encrypt)
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ENTRY(ce_aes_cbc_cts_decrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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movw ip, :lower16:.Lcts_permute_table
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movt ip, :upper16:.Lcts_permute_table
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sub r4, r4, #16
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add lr, ip, #32
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add ip, ip, r4
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sub lr, lr, r4
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vld1.8 {q5}, [ip]
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vld1.8 {q6}, [lr]
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add ip, r1, r4
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vld1.8 {q0}, [r1] @ overlapping loads
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vld1.8 {q1}, [ip]
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vld1.8 {q3}, [r5] @ get iv
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prepare_key r2, r3
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bl aes_decrypt
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vtbl.8 d4, {d0-d1}, d10
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vtbl.8 d5, {d0-d1}, d11
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vtbx.8 d0, {d2-d3}, d12
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vtbx.8 d1, {d2-d3}, d13
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veor q1, q1, q2
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bl aes_decrypt
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veor q0, q0, q3 @ xor with iv
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add r4, r0, r4
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vst1.8 {q1}, [r4] @ overlapping stores
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vst1.8 {q0}, [r0]
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pop {r4-r6, pc}
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ENDPROC(ce_aes_cbc_cts_decrypt)
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/*
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* aes_ctr_encrypt(u8 out[], u8 const in[], u32 const rk[], int rounds,
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* int blocks, u8 ctr[])
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*/
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ENTRY(ce_aes_ctr_encrypt)
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push {r4-r6, lr}
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ldrd r4, r5, [sp, #16]
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vld1.8 {q7}, [r5] @ load ctr
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prepare_key r2, r3
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vmov r6, s31 @ keep swabbed ctr in r6
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rev r6, r6
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cmn r6, r4 @ 32 bit overflow?
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bcs .Lctrloop
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.Lctrloop4x:
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subs r4, r4, #4
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bmi .Lctr1x
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/*
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* NOTE: the sequence below has been carefully tweaked to avoid
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* a silicon erratum that exists in Cortex-A57 (#1742098) and
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* Cortex-A72 (#1655431) cores, where AESE/AESMC instruction pairs
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* may produce an incorrect result if they take their input from a
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* register of which a single 32-bit lane has been updated the last
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* time it was modified. To work around this, the lanes of registers
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* q0-q3 below are not manipulated individually, and the different
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* counter values are prepared by successive manipulations of q7.
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*/
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add ip, r6, #1
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vmov q0, q7
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rev ip, ip
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add lr, r6, #2
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vmov s31, ip @ set lane 3 of q1 via q7
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add ip, r6, #3
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rev lr, lr
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vmov q1, q7
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vmov s31, lr @ set lane 3 of q2 via q7
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rev ip, ip
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vmov q2, q7
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vmov s31, ip @ set lane 3 of q3 via q7
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add r6, r6, #4
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vmov q3, q7
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vld1.8 {q4-q5}, [r1]!
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vld1.8 {q6}, [r1]!
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vld1.8 {q15}, [r1]!
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bl aes_encrypt_4x
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veor q0, q0, q4
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veor q1, q1, q5
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veor q2, q2, q6
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veor q3, q3, q15
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rev ip, r6
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vst1.8 {q0-q1}, [r0]!
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vst1.8 {q2-q3}, [r0]!
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vmov s31, ip
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b .Lctrloop4x
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.Lctr1x:
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adds r4, r4, #4
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beq .Lctrout
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.Lctrloop:
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vmov q0, q7
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bl aes_encrypt
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adds r6, r6, #1 @ increment BE ctr
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rev ip, r6
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vmov s31, ip
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bcs .Lctrcarry
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.Lctrcarrydone:
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subs r4, r4, #1
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bmi .Lctrtailblock @ blocks < 0 means tail block
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vld1.8 {q3}, [r1]!
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veor q3, q0, q3
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vst1.8 {q3}, [r0]!
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bne .Lctrloop
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.Lctrout:
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vst1.8 {q7}, [r5] @ return next CTR value
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pop {r4-r6, pc}
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.Lctrtailblock:
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vst1.8 {q0}, [r0, :64] @ return the key stream
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b .Lctrout
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.Lctrcarry:
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.irp sreg, s30, s29, s28
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vmov ip, \sreg @ load next word of ctr
|
|
rev ip, ip @ ... to handle the carry
|
|
adds ip, ip, #1
|
|
rev ip, ip
|
|
vmov \sreg, ip
|
|
bcc .Lctrcarrydone
|
|
.endr
|
|
b .Lctrcarrydone
|
|
ENDPROC(ce_aes_ctr_encrypt)
|
|
|
|
/*
|
|
* aes_xts_encrypt(u8 out[], u8 const in[], u32 const rk1[], int rounds,
|
|
* int bytes, u8 iv[], u32 const rk2[], int first)
|
|
* aes_xts_decrypt(u8 out[], u8 const in[], u32 const rk1[], int rounds,
|
|
* int bytes, u8 iv[], u32 const rk2[], int first)
|
|
*/
|
|
|
|
.macro next_tweak, out, in, const, tmp
|
|
vshr.s64 \tmp, \in, #63
|
|
vand \tmp, \tmp, \const
|
|
vadd.u64 \out, \in, \in
|
|
vext.8 \tmp, \tmp, \tmp, #8
|
|
veor \out, \out, \tmp
|
|
.endm
|
|
|
|
ce_aes_xts_init:
|
|
vmov.i32 d30, #0x87 @ compose tweak mask vector
|
|
vmovl.u32 q15, d30
|
|
vshr.u64 d30, d31, #7
|
|
|
|
ldrd r4, r5, [sp, #16] @ load args
|
|
ldr r6, [sp, #28]
|
|
vld1.8 {q0}, [r5] @ load iv
|
|
teq r6, #1 @ start of a block?
|
|
bxne lr
|
|
|
|
@ Encrypt the IV in q0 with the second AES key. This should only
|
|
@ be done at the start of a block.
|
|
ldr r6, [sp, #24] @ load AES key 2
|
|
prepare_key r6, r3
|
|
add ip, r6, #32 @ 3rd round key of key 2
|
|
b .Laes_encrypt_tweak @ tail call
|
|
ENDPROC(ce_aes_xts_init)
|
|
|
|
ENTRY(ce_aes_xts_encrypt)
|
|
push {r4-r6, lr}
|
|
|
|
bl ce_aes_xts_init @ run shared prologue
|
|
prepare_key r2, r3
|
|
vmov q4, q0
|
|
|
|
teq r6, #0 @ start of a block?
|
|
bne .Lxtsenc4x
|
|
|
|
.Lxtsencloop4x:
|
|
next_tweak q4, q4, q15, q10
|
|
.Lxtsenc4x:
|
|
subs r4, r4, #64
|
|
bmi .Lxtsenc1x
|
|
vld1.8 {q0-q1}, [r1]! @ get 4 pt blocks
|
|
vld1.8 {q2-q3}, [r1]!
|
|
next_tweak q5, q4, q15, q10
|
|
veor q0, q0, q4
|
|
next_tweak q6, q5, q15, q10
|
|
veor q1, q1, q5
|
|
next_tweak q7, q6, q15, q10
|
|
veor q2, q2, q6
|
|
veor q3, q3, q7
|
|
bl aes_encrypt_4x
|
|
veor q0, q0, q4
|
|
veor q1, q1, q5
|
|
veor q2, q2, q6
|
|
veor q3, q3, q7
|
|
vst1.8 {q0-q1}, [r0]! @ write 4 ct blocks
|
|
vst1.8 {q2-q3}, [r0]!
|
|
vmov q4, q7
|
|
teq r4, #0
|
|
beq .Lxtsencret
|
|
b .Lxtsencloop4x
|
|
.Lxtsenc1x:
|
|
adds r4, r4, #64
|
|
beq .Lxtsencout
|
|
subs r4, r4, #16
|
|
bmi .LxtsencctsNx
|
|
.Lxtsencloop:
|
|
vld1.8 {q0}, [r1]!
|
|
.Lxtsencctsout:
|
|
veor q0, q0, q4
|
|
bl aes_encrypt
|
|
veor q0, q0, q4
|
|
teq r4, #0
|
|
beq .Lxtsencout
|
|
subs r4, r4, #16
|
|
next_tweak q4, q4, q15, q6
|
|
bmi .Lxtsenccts
|
|
vst1.8 {q0}, [r0]!
|
|
b .Lxtsencloop
|
|
.Lxtsencout:
|
|
vst1.8 {q0}, [r0]
|
|
.Lxtsencret:
|
|
vst1.8 {q4}, [r5]
|
|
pop {r4-r6, pc}
|
|
|
|
.LxtsencctsNx:
|
|
vmov q0, q3
|
|
sub r0, r0, #16
|
|
.Lxtsenccts:
|
|
movw ip, :lower16:.Lcts_permute_table
|
|
movt ip, :upper16:.Lcts_permute_table
|
|
|
|
add r1, r1, r4 @ rewind input pointer
|
|
add r4, r4, #16 @ # bytes in final block
|
|
add lr, ip, #32
|
|
add ip, ip, r4
|
|
sub lr, lr, r4
|
|
add r4, r0, r4 @ output address of final block
|
|
|
|
vld1.8 {q1}, [r1] @ load final partial block
|
|
vld1.8 {q2}, [ip]
|
|
vld1.8 {q3}, [lr]
|
|
|
|
vtbl.8 d4, {d0-d1}, d4
|
|
vtbl.8 d5, {d0-d1}, d5
|
|
vtbx.8 d0, {d2-d3}, d6
|
|
vtbx.8 d1, {d2-d3}, d7
|
|
|
|
vst1.8 {q2}, [r4] @ overlapping stores
|
|
mov r4, #0
|
|
b .Lxtsencctsout
|
|
ENDPROC(ce_aes_xts_encrypt)
|
|
|
|
|
|
ENTRY(ce_aes_xts_decrypt)
|
|
push {r4-r6, lr}
|
|
|
|
bl ce_aes_xts_init @ run shared prologue
|
|
prepare_key r2, r3
|
|
vmov q4, q0
|
|
|
|
/* subtract 16 bytes if we are doing CTS */
|
|
tst r4, #0xf
|
|
subne r4, r4, #0x10
|
|
|
|
teq r6, #0 @ start of a block?
|
|
bne .Lxtsdec4x
|
|
|
|
.Lxtsdecloop4x:
|
|
next_tweak q4, q4, q15, q10
|
|
.Lxtsdec4x:
|
|
subs r4, r4, #64
|
|
bmi .Lxtsdec1x
|
|
vld1.8 {q0-q1}, [r1]! @ get 4 ct blocks
|
|
vld1.8 {q2-q3}, [r1]!
|
|
next_tweak q5, q4, q15, q10
|
|
veor q0, q0, q4
|
|
next_tweak q6, q5, q15, q10
|
|
veor q1, q1, q5
|
|
next_tweak q7, q6, q15, q10
|
|
veor q2, q2, q6
|
|
veor q3, q3, q7
|
|
bl aes_decrypt_4x
|
|
veor q0, q0, q4
|
|
veor q1, q1, q5
|
|
veor q2, q2, q6
|
|
veor q3, q3, q7
|
|
vst1.8 {q0-q1}, [r0]! @ write 4 pt blocks
|
|
vst1.8 {q2-q3}, [r0]!
|
|
vmov q4, q7
|
|
teq r4, #0
|
|
beq .Lxtsdecout
|
|
b .Lxtsdecloop4x
|
|
.Lxtsdec1x:
|
|
adds r4, r4, #64
|
|
beq .Lxtsdecout
|
|
subs r4, r4, #16
|
|
.Lxtsdecloop:
|
|
vld1.8 {q0}, [r1]!
|
|
bmi .Lxtsdeccts
|
|
.Lxtsdecctsout:
|
|
veor q0, q0, q4
|
|
bl aes_decrypt
|
|
veor q0, q0, q4
|
|
vst1.8 {q0}, [r0]!
|
|
teq r4, #0
|
|
beq .Lxtsdecout
|
|
subs r4, r4, #16
|
|
next_tweak q4, q4, q15, q6
|
|
b .Lxtsdecloop
|
|
.Lxtsdecout:
|
|
vst1.8 {q4}, [r5]
|
|
pop {r4-r6, pc}
|
|
|
|
.Lxtsdeccts:
|
|
movw ip, :lower16:.Lcts_permute_table
|
|
movt ip, :upper16:.Lcts_permute_table
|
|
|
|
add r1, r1, r4 @ rewind input pointer
|
|
add r4, r4, #16 @ # bytes in final block
|
|
add lr, ip, #32
|
|
add ip, ip, r4
|
|
sub lr, lr, r4
|
|
add r4, r0, r4 @ output address of final block
|
|
|
|
next_tweak q5, q4, q15, q6
|
|
|
|
vld1.8 {q1}, [r1] @ load final partial block
|
|
vld1.8 {q2}, [ip]
|
|
vld1.8 {q3}, [lr]
|
|
|
|
veor q0, q0, q5
|
|
bl aes_decrypt
|
|
veor q0, q0, q5
|
|
|
|
vtbl.8 d4, {d0-d1}, d4
|
|
vtbl.8 d5, {d0-d1}, d5
|
|
vtbx.8 d0, {d2-d3}, d6
|
|
vtbx.8 d1, {d2-d3}, d7
|
|
|
|
vst1.8 {q2}, [r4] @ overlapping stores
|
|
mov r4, #0
|
|
b .Lxtsdecctsout
|
|
ENDPROC(ce_aes_xts_decrypt)
|
|
|
|
/*
|
|
* u32 ce_aes_sub(u32 input) - use the aese instruction to perform the
|
|
* AES sbox substitution on each byte in
|
|
* 'input'
|
|
*/
|
|
ENTRY(ce_aes_sub)
|
|
vdup.32 q1, r0
|
|
veor q0, q0, q0
|
|
aese.8 q0, q1
|
|
vmov r0, s0
|
|
bx lr
|
|
ENDPROC(ce_aes_sub)
|
|
|
|
/*
|
|
* void ce_aes_invert(u8 *dst, u8 *src) - perform the Inverse MixColumns
|
|
* operation on round key *src
|
|
*/
|
|
ENTRY(ce_aes_invert)
|
|
vld1.32 {q0}, [r1]
|
|
aesimc.8 q0, q0
|
|
vst1.32 {q0}, [r0]
|
|
bx lr
|
|
ENDPROC(ce_aes_invert)
|
|
|
|
.section ".rodata", "a"
|
|
.align 6
|
|
.Lcts_permute_table:
|
|
.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
|
|
.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
|
|
.byte 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
|
|
.byte 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf
|
|
.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
|
|
.byte 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
|