2d4103ae31
Bring in documentation for UltraSoc SMB driver. It simply describes the device, sysfs interface and the firmware bindings. Signed-off-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Junhao He <hejunhao3@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230114101302.62320-3-hejunhao3@huawei.com
84 lines
3.6 KiB
ReStructuredText
84 lines
3.6 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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======================================
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UltraSoc - HW Assisted Tracing on SoC
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======================================
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:Author: Qi Liu <liuqi115@huawei.com>
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:Date: January 2023
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Introduction
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------------
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UltraSoc SMB is a per SCCL (Super CPU Cluster) hardware. It provides a
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way to buffer and store CPU trace messages in a region of shared system
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memory. The device acts as a coresight sink device and the
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corresponding trace generators (ETM) are attached as source devices.
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Sysfs files and directories
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---------------------------
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The SMB devices appear on the existing coresight bus alongside other
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devices::
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$# ls /sys/bus/coresight/devices/
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ultra_smb0 ultra_smb1 ultra_smb2 ultra_smb3
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The ``ultra_smb<N>`` names SMB device associated with SCCL.::
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$# ls /sys/bus/coresight/devices/ultra_smb0
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enable_sink mgmt
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$# ls /sys/bus/coresight/devices/ultra_smb0/mgmt
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buf_size buf_status read_pos write_pos
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Key file items are:
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* ``read_pos``: Shows the value on the read pointer register.
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* ``write_pos``: Shows the value on the write pointer register.
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* ``buf_status``: Shows the value on the status register.
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BIT(0) is zero value which means the buffer is empty.
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* ``buf_size``: Shows the buffer size of each device.
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Firmware Bindings
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-----------------
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The device is only supported with ACPI. Its binding describes device
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identifier, resource information and graph structure.
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The device is identified as ACPI HID "HISI03A1". Device resources are allocated
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using the _CRS method. Each device must present two base address; the first one
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is the configuration base address of the device, the second one is the 32-bit
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base address of shared system memory.
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Example::
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Device(USMB) { \
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Name(_HID, "HISI03A1") \
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Name(_CRS, ResourceTemplate() { \
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QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, NonCacheable, \
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ReadWrite, 0x0, 0x95100000, 0x951FFFFF, 0x0, 0x100000) \
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QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, Cacheable, \
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ReadWrite, 0x0, 0x50000000, 0x53FFFFFF, 0x0, 0x4000000) \
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}) \
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Name(_DSD, Package() { \
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ToUUID("ab02a46b-74c7-45a2-bd68-f7d344ef2153"), \
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/* Use CoreSight Graph ACPI bindings to describe connections topology */
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Package() { \
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0, \
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1, \
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Package() { \
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1, \
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ToUUID("3ecbc8b6-1d0e-4fb3-8107-e627f805c6cd"), \
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8, \
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Package() {0x8, 0, \_SB.S00.SL11.CL28.F008, 0}, \
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Package() {0x9, 0, \_SB.S00.SL11.CL29.F009, 0}, \
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Package() {0xa, 0, \_SB.S00.SL11.CL2A.F010, 0}, \
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Package() {0xb, 0, \_SB.S00.SL11.CL2B.F011, 0}, \
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Package() {0xc, 0, \_SB.S00.SL11.CL2C.F012, 0}, \
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Package() {0xd, 0, \_SB.S00.SL11.CL2D.F013, 0}, \
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Package() {0xe, 0, \_SB.S00.SL11.CL2E.F014, 0}, \
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Package() {0xf, 0, \_SB.S00.SL11.CL2F.F015, 0}, \
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} \
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} \
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}) \
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}
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