892067cda2
Add support for the Watchdog Timer (WDT) hardware found in the Renesas RZ/V2H(P) SoC to the `renesas,wdt` device tree bindings. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240829193831.80768-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
205 lines
5.1 KiB
YAML
205 lines
5.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/renesas,wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Watchdog Timer (WDT) Controller
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maintainers:
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- Wolfram Sang <wsa+renesas@sang-engineering.com>
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- Geert Uytterhoeven <geert+renesas@glider.be>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,r7s72100-wdt # RZ/A1
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- renesas,r7s9210-wdt # RZ/A2
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- const: renesas,rza-wdt # RZ/A
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- items:
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- enum:
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- renesas,r9a06g032-wdt # RZ/N1D
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- const: renesas,rzn1-wdt # RZ/N1
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- items:
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- enum:
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- renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five
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- renesas,r9a07g044-wdt # RZ/G2{L,LC}
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- renesas,r9a07g054-wdt # RZ/V2L
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- renesas,r9a08g045-wdt # RZ/G3S
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- const: renesas,rzg2l-wdt
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- items:
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- enum:
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- renesas,r9a09g011-wdt # RZ/V2M
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- const: renesas,rzv2m-wdt # RZ/V2M
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- items:
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- enum:
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- renesas,r8a7742-wdt # RZ/G1H
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- renesas,r8a7743-wdt # RZ/G1M
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- renesas,r8a7744-wdt # RZ/G1N
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- renesas,r8a7745-wdt # RZ/G1E
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- renesas,r8a77470-wdt # RZ/G1C
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- renesas,r8a7790-wdt # R-Car H2
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- renesas,r8a7791-wdt # R-Car M2-W
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- renesas,r8a7792-wdt # R-Car V2H
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- renesas,r8a7793-wdt # R-Car M2-N
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- renesas,r8a7794-wdt # R-Car E2
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- const: renesas,rcar-gen2-wdt # R-Car Gen2 and RZ/G1
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- items:
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- enum:
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- renesas,r8a774a1-wdt # RZ/G2M
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- renesas,r8a774b1-wdt # RZ/G2N
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- renesas,r8a774c0-wdt # RZ/G2E
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- renesas,r8a774e1-wdt # RZ/G2H
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- renesas,r8a7795-wdt # R-Car H3
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- renesas,r8a7796-wdt # R-Car M3-W
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- renesas,r8a77961-wdt # R-Car M3-W+
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- renesas,r8a77965-wdt # R-Car M3-N
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- renesas,r8a77970-wdt # R-Car V3M
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- renesas,r8a77980-wdt # R-Car V3H
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- renesas,r8a77990-wdt # R-Car E3
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- renesas,r8a77995-wdt # R-Car D3
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- const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2
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- items:
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- enum:
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- renesas,r8a779a0-wdt # R-Car V3U
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- renesas,r8a779f0-wdt # R-Car S4-8
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- renesas,r8a779g0-wdt # R-Car V4H
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- renesas,r8a779h0-wdt # R-Car V4M
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- const: renesas,rcar-gen4-wdt # R-Car Gen4
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- const: renesas,r9a09g057-wdt # RZ/V2H(P)
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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items:
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- description: Timeout
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- description: Parity error
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interrupt-names:
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minItems: 1
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items:
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- const: wdt
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- const: perrout
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clocks:
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minItems: 1
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items:
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- description: Register access clock
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- description: Main clock
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clock-names:
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minItems: 1
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items:
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- const: pclk
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- const: oscclk
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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timeout-sec: true
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required:
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- compatible
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- reg
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- clocks
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allOf:
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- $ref: watchdog.yaml#
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- if:
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not:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rza-wdt
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- renesas,rzn1-wdt
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then:
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required:
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- power-domains
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- resets
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,r9a09g057-wdt
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- renesas,rzg2l-wdt
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- renesas,rzv2m-wdt
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then:
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properties:
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clocks:
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minItems: 2
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clock-names:
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minItems: 2
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rzg2l-wdt
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then:
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properties:
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interrupts:
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minItems: 2
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interrupt-names:
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minItems: 2
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required:
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- interrupt-names
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else:
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properties:
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interrupts:
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maxItems: 1
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a09g057-wdt
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then:
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properties:
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interrupts: false
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interrupt-names: false
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else:
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required:
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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wdt0: watchdog@e6020000 {
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compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
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reg = <0xe6020000 0x0c>;
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 402>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 402>;
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timeout-sec = <60>;
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};
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