aa67971b27
Add Unisoc ums9620 UFS host controller devicetree document. Signed-off-by: Zhe Wang <zhe.wang1@unisoc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
80 lines
1.8 KiB
YAML
80 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Unisoc Universal Flash Storage (UFS) Controller
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maintainers:
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- Zhe Wang <zhe.wang1@unisoc.com>
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allOf:
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- $ref: ufs-common.yaml
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properties:
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compatible:
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const: sprd,ums9620-ufs
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reg:
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maxItems: 1
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: controller_eb
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- const: cfg_eb
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- const: core
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resets:
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maxItems: 2
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reset-names:
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items:
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- const: controller
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- const: device
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vdd-mphy-supply:
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description:
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Phandle to vdd-mphy supply regulator node.
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sprd,ufs-anlg-syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle of syscon used to control ufs analog regs.
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sprd,aon-apb-syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle of syscon used to control always-on regs.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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ufs: ufs@22000000 {
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compatible = "sprd,ums9620-ufs";
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reg = <0x22000000 0x3000>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
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vcc-supply = <&vddemmccore>;
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vdd-mphy-supply = <&vddufs1v2>;
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clocks = <&apahb_gate 5>, <&apahb_gate 22>, <&aonapb_clk 52>;
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clock-names = "controller_eb", "cfg_eb", "core";
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assigned-clocks = <&aonapb_clk 52>;
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assigned-clock-parents = <&g5l_pll 12>;
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resets = <&apahb_gate 4>, <&aonapb_gate 69>;
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reset-names = "controller", "device";
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sprd,ufs-anlg-syscon = <&anlg_phy_g12_regs>;
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sprd,aon-apb-syscon = <&aon_apb_regs>;
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};
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