78aaf42921
"fsl,imx8qxp-cm4" and "fsl,imx8qm-cm4" need minimum 2 power domains. Other platform doesn't require 'power-domain'. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240610151721.274424-1-Frank.Li@nxp.com Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
151 lines
3.5 KiB
YAML
151 lines
3.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX Co-Processor
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description:
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This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
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maintainers:
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- Peng Fan <peng.fan@nxp.com>
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properties:
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compatible:
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enum:
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- fsl,imx6sx-cm4
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- fsl,imx7d-cm4
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- fsl,imx7ulp-cm4
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- fsl,imx8mm-cm4
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- fsl,imx8mn-cm7
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- fsl,imx8mn-cm7-mmio
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- fsl,imx8mp-cm7
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- fsl,imx8mp-cm7-mmio
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- fsl,imx8mq-cm4
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- fsl,imx8qm-cm4
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- fsl,imx8qxp-cm4
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- fsl,imx8ulp-cm33
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- fsl,imx93-cm33
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clocks:
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maxItems: 1
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syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to syscon block which provide access to System Reset Controller
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mbox-names:
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items:
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- const: tx
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- const: rx
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- const: rxdb
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mboxes:
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description:
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This property is required only if the rpmsg/virtio functionality is used.
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List of <&phandle type channel> - 1 channel for TX, 1 channel for RX, 1 channel for RXDB.
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(see mailbox/fsl,mu.yaml)
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minItems: 1
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maxItems: 3
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memory-region:
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description:
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If present, a phandle for a reserved memory area that used for vdev buffer,
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resource table, vring region and others used by remote processor.
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minItems: 1
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maxItems: 32
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power-domains:
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minItems: 2
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maxItems: 8
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fsl,auto-boot:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Indicate whether need to load the default firmware and start the remote
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processor automatically.
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fsl,entry-address:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Specify CPU entry address for SCU enabled processor.
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fsl,iomuxc-gpr:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit.
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fsl,resource-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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This property is to specify the resource id of the remote processor in SoC
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which supports SCFW
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required:
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- compatible
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allOf:
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- if:
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properties:
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compatible:
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not:
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contains:
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enum:
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- fsl,imx8mn-cm7-mmio
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- fsl,imx8mp-cm7-mmio
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then:
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properties:
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fsl,iomuxc-gpr: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,imx8qxp-cm4
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- fsl,imx8qm-cm4
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then:
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required:
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- power-domains
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else:
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properties:
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power-domains: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx7d-clock.h>
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m4_reserved_sysmem1: cm4@80000000 {
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reg = <0x80000000 0x80000>;
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};
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m4_reserved_sysmem2: cm4@81000000 {
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reg = <0x81000000 0x80000>;
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};
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imx7d-cm4 {
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compatible = "fsl,imx7d-cm4";
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memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>;
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syscon = <&src>;
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clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>;
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};
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- |
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#include <dt-bindings/clock/imx8mm-clock.h>
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imx8mm-cm4 {
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compatible = "fsl,imx8mm-cm4";
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clocks = <&clk IMX8MM_CLK_M4_DIV>;
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mbox-names = "tx", "rx", "rxdb";
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mboxes = <&mu 0 1
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&mu 1 1
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&mu 3 1>;
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memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
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syscon = <&src>;
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};
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...
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