743025b0e0
Document DT bindings for PCIe Endpoint controller found in Rockchip SoCs. Link: https://lore.kernel.org/linux-pci/20240607-rockchip-pcie-ep-v1-v5-6-0a042d6b0049@kernel.org Signed-off-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
127 lines
3.2 KiB
YAML
127 lines
3.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: DesignWare based PCIe RC/EP controller on Rockchip SoCs
|
|
|
|
maintainers:
|
|
- Shawn Lin <shawn.lin@rock-chips.com>
|
|
- Simon Xue <xxm@rock-chips.com>
|
|
- Heiko Stuebner <heiko@sntech.de>
|
|
|
|
description: |+
|
|
Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip
|
|
SoCs.
|
|
|
|
properties:
|
|
clocks:
|
|
minItems: 5
|
|
items:
|
|
- description: AHB clock for PCIe master
|
|
- description: AHB clock for PCIe slave
|
|
- description: AHB clock for PCIe dbi
|
|
- description: APB clock for PCIe
|
|
- description: Auxiliary clock for PCIe
|
|
- description: PIPE clock
|
|
- description: Reference clock for PCIe
|
|
|
|
clock-names:
|
|
minItems: 5
|
|
items:
|
|
- const: aclk_mst
|
|
- const: aclk_slv
|
|
- const: aclk_dbi
|
|
- const: pclk
|
|
- const: aux
|
|
- const: pipe
|
|
- const: ref
|
|
|
|
interrupts:
|
|
minItems: 5
|
|
items:
|
|
- description:
|
|
Combined system interrupt, which is used to signal the following
|
|
interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,
|
|
hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,
|
|
edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app
|
|
- description:
|
|
Combined PM interrupt, which is used to signal the following
|
|
interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,
|
|
linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,
|
|
linkst_out_l0s, pm_dstate_update
|
|
- description:
|
|
Combined message interrupt, which is used to signal the following
|
|
interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,
|
|
pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
|
|
- description:
|
|
Combined legacy interrupt, which is used to signal the following
|
|
interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc,
|
|
tx_intd
|
|
- description:
|
|
Combined error interrupt, which is used to signal the following
|
|
interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,
|
|
tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,
|
|
nf_err_rx, f_err_rx, radm_qoverflow
|
|
- description:
|
|
eDMA write channel 0 interrupt
|
|
- description:
|
|
eDMA write channel 1 interrupt
|
|
- description:
|
|
eDMA read channel 0 interrupt
|
|
- description:
|
|
eDMA read channel 1 interrupt
|
|
|
|
interrupt-names:
|
|
minItems: 5
|
|
items:
|
|
- const: sys
|
|
- const: pmc
|
|
- const: msg
|
|
- const: legacy
|
|
- const: err
|
|
- const: dma0
|
|
- const: dma1
|
|
- const: dma2
|
|
- const: dma3
|
|
|
|
num-lanes: true
|
|
|
|
phys:
|
|
maxItems: 1
|
|
|
|
phy-names:
|
|
const: pcie-phy
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
resets:
|
|
minItems: 1
|
|
maxItems: 2
|
|
|
|
reset-names:
|
|
oneOf:
|
|
- const: pipe
|
|
- items:
|
|
- const: pwr
|
|
- const: pipe
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- reg-names
|
|
- clocks
|
|
- clock-names
|
|
- num-lanes
|
|
- phys
|
|
- phy-names
|
|
- power-domains
|
|
- resets
|
|
- reset-names
|
|
|
|
additionalProperties: true
|
|
|
|
...
|